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A 20GS/s 8b Time-Interleaved Time-Domain ADC with Input-Independent Background Timing Skew Calibration Conference paper
IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Authors:  Zhang, Minglei;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
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Background  input independent  time domain ADC  time-interleaved ADC  timing skew calibration  
An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4thNyquist Zone in 1GS/s ADC Conference paper
IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Authors:  Wei, Lai;  Zheng, Zihao;  Markulic, Nereo;  Lagos, Jorge;  Martens, Ewout;  Zhu, Yan;  Chan, Chi Hang;  Craninckx, Jan;  Martins, Rui Paulo
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Background calibration  nonlinearity  pipelined ADC  split-SAR ADC  
A 79.1dB-SNDR 20MHz-BW 2nd-Order SAR-Assisted Noise-Shaping Pipeline ADC with Gain and Offset Background Calibrations Based on Convergence Enhanced Split-Over-Time Architecture Conference paper
Proceedings of the Custom Integrated Circuits Conference
Authors:  Zhang, Yanbo;  Zhang, Jin;  Liu, Shubin;  Zhu, Zhangming;  Zhu, Yan;  Chan, Chi Hang;  Martins, R. P.
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Bird's-eye view of analog and mixed-signal chips for the 21st century Journal article
International Journal of Circuit Theory and Applications, 2021
Authors:  Martins,Rui P.;  Mak,Pui In;  Chan,Chi Hang;  Yin,Jun;  Zhu,Yan;  Chen,Yong;  Lu,Yan;  Law,Man Kay;  Sin,Sai Weng
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Analog And Mixed-signal Chips  Analog Digital Interface  Data Converters  Energy Harvesting  Integrated Power Converters  Internet Of Everything  Millimeter-wave Frequency Generators  Wireless Cellular Transceivers  
27.6 A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Zhang, Hongshuai;  Zhu, Yan;  Chan, Chi Hang;  Martins, R. P.
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A 7-bit 2 GS/s Time-Interleaved SAR ADC with Timing Skew Calibration Based on Current Integrating Sampler Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021,Volume: 68,Issue: 2,Page: 557-568
Authors:  Jiang,Wenning;  Zhu,Yan;  Chan,Chi Hang;  Murmann,Boris;  Martins,Rui Paulo
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Analog-to-digital converter  background timing skew calibration  current integrating sampler  SAR ADC  time-interleaved ADC  timing skew  
A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier Journal article
IEEE Journal of Solid-State Circuits, 2021
Authors:  Zheng, Zihao;  Wei, Lai;  Lagos, Jorge;  Martens, Ewout;  Zhu, Yan;  Chan, Chi Hang;  Craninckx, Jan;  Martins, Rui P.
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Analog-to-digital conversion  calibration  Calibration  dynamic amplifier (DA)  Hardware  Linearity  linearization technique  Pipeline processing  pipelined analog-to-digital converter (ADC).  Quantization (signal)  Signal resolution  System-on-chip  
A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021
Authors:  Xing, Kai;  Wang, Wei;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
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Analog-to-digital conversion (ADC)  continuous-time delta-sigma modulator (CTDSM)  Gain  high-speed noise-shaping SAR (NS-SAR).  Loading  Low-frequency noise  Modulation  preliminary sampling and quantization (PSQ) technique  Quantization (signal)  SAB-ELD-merged integrator  three-stage Opamp  Topology  Wideband  
A 0.04% BER Strong PUF with Cell-Bias-Based CRPs Filtering and Background Offset Calibration Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 3853-3865
Authors:  Liu,Jiahao;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui Paulo
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authentication  hardware security  Internet of Things  low power  machine learning attacks  Physical unclonable function (PUF)  
A Calibration-Free Ring-Oscillator PLL with Gain Tracking Achieving 9% Jitter Variation over PVT Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 3753-3763
Authors:  Yang,Xiaofeng;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui Paulo
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calibration-free  discrete-time  gain tracking  Jitter  open-loop  phase noise cancellation (PNC)  phase-locked loop (PLL)  PVT  reference spur  ring voltage-controlled oscillator (RVCO)