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Licochalcone A inhibits interferon-gamma-induced programmed death-ligand 1 in lung cancer cells Journal article
Phytomedicine, 2021,Volume: 80
Authors:  Yuan,Luo Wei;  Jiang,Xiao Ming;  Xu,Yu Lian;  Huang,Mu Yang;  Chen,Yu Chi;  Yu,Wei Bang;  Su,Min Xia;  Ye,Zi Han;  Chen,Xiuping;  Wang,Yitao;  Lu,Jin Jian
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/03/01
Ifn-γ  Licochalcone a  Natural Products  Pd-l1  Protein Synthesis Inhibitor  Ros  
Dissecting the mechanism of Yuzhi Zhixue granule on ovulatory dysfunctional uterine bleeding by network pharmacology and molecular docking Journal article
Chinese Medicine (United Kingdom), 2020,Volume: 15,Issue: 1
Authors:  Li,Jialin;  Luo,Hua;  Liu,Xinkui;  Zhang,Jingyuan;  Zhou,Wei;  Guo,Siyu;  Chen,Xiuping;  Liu,Yingying;  Jia,Shanshan;  Wang,Haojia;  Li,Bingbing;  Cheng,Guoliang;  Wu,Jiarui
Favorite |  | TC[WOS]:2 TC[Scopus]:1 | Submit date:2021/03/01
Mechanisms  Molecular Docking  Network pharmacology  Ovulatory Dysfunctional Uterine Bleeding  Yuzhi zhixue granule  
A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 6,Page: 1588-1598
Authors:  Wang,Wei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:1 | Submit date:2020/12/04
Analog-to-digital conversion (ADC)  continuous-time delta-sigma modulator (CT-DSM)  preliminary sampling and quantization (PSQ) technique  single amplifier biquad (SAB)  successiveapproximation-register (SAR) architecture-based quantizer (QTZ)  
A 1.6-GS/s 12.2-mW Seven-/Eight-Way Split Time-Interleaved SAR ADC Achieving 54.2-dB SNDR with Digital Background Timing Mismatch Calibration Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 3,Page: 693-705
Authors:  Guo,Mingqiang;  Mao,Jiaji;  Sin,Sai Weng;  Wei,Hegong;  Martins,Rui P.
Favorite |  | TC[WOS]:2 TC[Scopus]:6 | Submit date:2021/03/04
Analog-to-digital converter (ADC)  digital background calibration  split ADC  time-interleaved (TI) ADC  timing-skew mismatch  
A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Zheng,Zihao;  Wei,Lai;  Lagos,Jorge;  Martens,Ewout;  Zhu,Yan;  Chan,Chi Hang;  Craninckx,Jan;  Martins,Rui P.
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The development of small-molecule inhibitors targeting CD47 Journal article
Drug Discovery Today, 2020
Authors:  Yu,Wei Bang;  Ye,Zi Han;  Chen,Xiuping;  Shi,Jia Jie;  Lu,Jin Jian
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A 5 GS/s 29 mW Interleaved SAR ADC with 48.5 dB SNDR Using Digital-Mixing Background Timing-Skew Calibration for Direct Sampling Applications Journal article
IEEE Access, 2020,Volume: 8,Page: 138944-138954
Authors:  Guo,Mingqiang;  Mao,Jiaji;  Sin,Sai Weng;  Wei,Hegong;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:1 | Submit date:2021/03/09
Analog-to-digital converter (ADC)  digital background calibration  digital-mixing  time-interleaved (TI) ADC  timing mismatch  
CMOS Cross-Coupled Differential-Drive Rectifier in Subthreshold Operation for Ambient RF Energy Harvesting-Model and Analysis Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2019,Volume: 66,Issue: 12,Page: 1942-1946
Authors:  Chong,Gabriel;  Ramiah,Harikrishnan;  Yin,Jun;  Rajendran,Jagadheswaran;  Wong,Wei Ru;  Mak,Pui In;  Martins,Rui P.
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CMOS  model  rectifier  RF energy harvesting  subthreshold operation  
A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 12,Page: 4850-4861
Authors:  Fan,Chao;  Yu,Wei Han;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:3 TC[Scopus]:1 | Submit date:2021/03/09
CMOS  current-mode-logic (CML) driver  feed-forward equalization (FFE)  four-level pulse-amplitude modulation (PAM-4)  source-series-terminated (SST) driver  SST-CML-Hybrid (SCH) driver  transmitter (TX)  
A 29mW 5GS/s Time-interleaved SAR ADC achieving 48.5dB SNDR with Fully-Digital Timing-Skew Calibration Based on Digital-Mixing Conference paper
IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Authors:  Guo,Mingqiang;  Mao,Jiaji;  Sin,Sai Weng;  Wei,Hegong;  Martins,R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:4 | Submit date:2021/03/09