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A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation Journal article
IEEE Journal of Solid-State Circuits, 2021,Volume: 56,Issue: 8,Page: 2375-2387
Authors:  Jiang, Dongyang;  Qi, Liang;  Sin, Sai Weng;  Maloberti, Franco;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/09/20
Analog-to-digital converter (ADC)  data weighting average (DWA)  delta-sigma modulator (DSM)  digital bank filters  digital-to-analog converter (DAC)  discrete-time (DT)  dithering  dynamic element matching (DEM)  extrapolation  noise-coupling  time-domain analysis  time-interleaved (TI)  
Bird's-eye view of analog and mixed-signal chips for the 21st century Journal article
International Journal of Circuit Theory and Applications, 2021
Authors:  Martins,Rui P.;  Mak,Pui In;  Chan,Chi Hang;  Yin,Jun;  Zhu,Yan;  Chen,Yong;  Lu,Yan;  Law,Man Kay;  Sin,Sai Weng
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/04
analog and mixed-signal chips  analog digital interface  data converters  energy harvesting  integrated power converters  Internet of Everything  millimeter-wave frequency generators  wireless cellular transceivers  
Discrete-time mash delta-sigma modulator with second-order digital noise coupling for wideband high-resolution applications Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems
Authors:  Qin, Xinyu;  Zhang, Jingying;  Qi, Liang;  Sin, Sai Weng;  Martins, Rui P.;  Wang, Guoxing
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/09/20
Digital noise coupling  Multistage noise shaping (MASH)  Noise leakage  Wideband high-resolution applications  ΔΣ modulator (DSM)  
LDO-Free Power Management System: A 10-bit Pipelined ADC Directly Powered by Inductor-Based Boost Converter with Ripple Calibration Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 12,Page: 4174-4186
Authors:  Wang,Hanyu;  Sin,Sai Weng;  Lam,Chi Seng;  Maloberti,Franco;  Martins,Rui Paulo
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/03/04
Power Management  Switching-mode Power Converters  Boost Dc-dc Converters  Analog-to-digital Converters (Adcs)  Pipelined Adc  Ripple Calibration  
Digital Battery Management Unit with Built-In Resistance Compensation, Modulated Frequency Detection and Multi-Mode Protection for Fast, Efficient and Safe Charging Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 4063-4074
Authors:  Li,Ji Xuan;  Sin,Sai Weng;  Chio,U. Fat;  Wu,Ya Jie;  Lam,Chi Seng;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/04
Battery Management Unit (Bmu)  Built-in Resistance (Bir)  Modulated Frequency Detection (Mfd)  Multi-mode Protection (Mmp)  Pulsed Constant Current (Pcc) Mode  
A 470-nA Quiescent Current and 92.7%/94.7% Efficiency DCT/PWM Control Buck Converter with Seamless Mode Selection for IoT Application Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 4085-4098
Authors:  Zeng,Wen Liang;  Ren,Yuan;  Lam,Chi Seng;  Sin,Sai Weng;  Che,Weng Keong;  Ding,Ran;  Martins,Rui Paulo
Favorite |  | TC[WOS]:4 TC[Scopus]:3 | Submit date:2021/03/04
buck converter  discontinuous conduction mode (DCM)  double clock time (DCT) control  Internet of things (IoT)  mode selection  pulse-width-modulation (PWM) current mode control  ultra-low-quiescent current  
A SAR-ADC-Assisted DC-DC Buck Converter with Fast Transient Recovery Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2020,Volume: 67,Issue: 9,Page: 1669-1673
Authors:  Zeng,Wen Liang;  Bonizzoni,Edoardo;  Wu,Chi Wa;  Lam,Chi Seng;  Sin,Sai Weng;  Chio,U. Fat;  Maloberti,Franco;  Martins,Rui Paulo
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/03/04
Adc  Current Pump  Additional Loop Compensation  Buck Converter  Dcm  Bond-wire Inductor  Fast Transient Recovery  
A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2nd-Order ΔΣ Modulator with Digital Feedforward Extrapolation in 28nm CMOS Conference paper
IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Authors:  Jiang,Dongyang;  Qi,Liang;  Sin,Sai Weng;  Maloberti,Franco;  Martins,R. P.
Favorite |  | TC[WOS]:0 TC[Scopus]:5 | Submit date:2021/03/04
A 1.6-GS/s 12.2-mW Seven-/Eight-Way Split Time-Interleaved SAR ADC Achieving 54.2-dB SNDR with Digital Background Timing Mismatch Calibration Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 3,Page: 693-705
Authors:  Guo,Mingqiang;  Mao,Jiaji;  Sin,Sai Weng;  Wei,Hegong;  Martins,Rui P.
Favorite |  | TC[WOS]:6 TC[Scopus]:10 | Submit date:2021/03/04
Analog-to-digital converter (ADC)  digital background calibration  split ADC  time-interleaved (TI) ADC  timing-skew mismatch  
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH with DAC Non-Linearity Tolerance Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 2,Page: 344-355
Authors:  Qi,Liang;  Jain,Ankesh;  Jiang,Dongyang;  Sin,Sai Weng;  Martins,Rui P.;  Ortmanns,Maurits
Favorite |  | TC[WOS]:8 TC[Scopus]:8 | Submit date:2021/03/09
Analog-to-digital converter (ADC)  continuous time (CT)  digital-to-analog converter (DAC) linearization  excess loop delay (ELD) compensation  filter  finite-impulse response (FIR)  multibit quantization  noise coupling (NC)  sturdy multistage noise-shaping (SMASH)  successive-approximation register (SAR)