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Digital Battery Management Unit with Built-In Resistance Compensation, Modulated Frequency Detection and Multi-Mode Protection for Fast, Efficient and Safe Charging Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 4063-4074
Authors:  Li,Ji Xuan;  Sin,Sai Weng;  Chio,U. Fat;  Wu,Ya Jie;  Lam,Chi Seng;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/04
Battery Management Unit (Bmu)  Built-in Resistance (Bir)  Modulated Frequency Detection (Mfd)  Multi-mode Protection (Mmp)  Pulsed Constant Current (Pcc) Mode  
A SAR-ADC-Assisted DC-DC Buck Converter with Fast Transient Recovery Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2020,Volume: 67,Issue: 9,Page: 1669-1673
Authors:  Zeng,Wen Liang;  Bonizzoni,Edoardo;  Wu,Chi Wa;  Lam,Chi Seng;  Sin,Sai Weng;  Chio,U. Fat;  Maloberti,Franco;  Martins,Rui Paulo
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/03/04
Adc  Current Pump  Additional Loop Compensation  Buck Converter  Dcm  Bond-wire Inductor  Fast Transient Recovery  
Digital Battery Management Unit with Built-In Resistance Compensation and Accidental Mutation Protection for Fast and Accurate Charging Conference paper
2019 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2019 - Proceedings
Authors:  Li,Ji Xuan;  Sin,Sai Weng;  Chio,U. Fat;  Wu,Ya Jie;  Lam,Chi Seng;  Martins,Rui Paulo
Favorite |  | TC[WOS]:0 TC[Scopus]:1 | Submit date:2021/03/09
accidental mutation protection (AMP)  Built-in resistance (BIR)  constant current (CC)  constant-voltage (CV)  fast charging  
An Integrated DC-DC Converter with Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery Journal article
IEEE Journal of Solid-State Circuits, 2019,Volume: 54,Issue: 10,Page: 2637-2648
Authors:  Chio,U. Fat;  Wen,Kuo Chih;  Sin,Sai Weng;  Lam,Chi Seng;  Lu,Yan;  Maloberti,Franco;  Martins,Rui P.
Favorite |  | TC[WOS]:3 TC[Scopus]:4 | Submit date:2021/03/09
Fully integrated  SC DC-DC converter  switched capacitor (SC)  voltage-controlled oscillator (VCO)  
A Slew Rate Variation Compensated 2 x VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2019,Volume: 66,Issue: 1,Page: 116-120
Authors:  Lee, Tzung-Je;  Tsai, Tsung-Yi;  Lin, Wei;  Chio, U-Fat;  Wang, Chua-Chin
Favorite |  | TC[WOS]:3 TC[Scopus]:3 | Submit date:2019/01/17
I/O buffer  mixed-voltage tolerant  PVT variation  leakage  slew rate compensation  
An Integrated DC-DC Converter with Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery Conference paper
2018 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC): PROCEEDINGS OF TECHNICAL PAPERS, Tainan, TAIWAN, NOV 05-07, 2018
Authors:  Chio, U-Fat;  Wen, Kuo-Chih;  Sin, Sai-Weng;  Lam, Chi-Seng;  Lu, Yan;  Maloberti, Franco;  Martins, R. P.
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2019/02/11
Fully Integrated  Sc Dc-dc Converter  Switched-capacitor  Voltage-controlled Oscillator (Vco)  
A 5-bit 2 GS/s binary-search ADC with charge-steering comparators Conference paper
2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), Seoul, SOUTH KOREA, NOV 06-08, 2017
Authors:  Chio, U-Fat;  Sin S.-W.;  Seng-Pan U.;  Maloberti F.;  Martins R.P.
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2019/02/11
Binary-search Adc  Asynchronous  Charge-steering  
A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017,Volume: 25,Issue: 11,Page: 3166-3174
Authors:  Lee, Tzung-Je;  Tsai, Tsung-Yi;  Lin, Wei;  Chio, U-Fat;  Wang, Chua-Chin
Favorite |  | TC[WOS]:4 TC[Scopus]:5 | Submit date:2018/10/30
Dynamic leakage reduction  I/O buffer  mixed-voltage tolerant  process-voltage-temperature (PVT) variation  slew rate compensation  
Mixed signal controller Patent
专利类型: 发明专利, 专利号: US20170141571A1, 申请日期: 2016-07-24,
Authors:  Man Chung WONG;  Chi Seng LAM;  Yan Zheng YANG;  Wai Hei CHOI;  Ning Yi DAI;  Yajie WU;  Chi Kong WONG;  Sai Weng SIN;  U Fat CHIO;  Seng Pan U;  Rui Paulo da Silva MARTINS
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/03/30
An 8-bit 0.7-GS/s single channel flash-SAR ADC in 65-nm CMOS technology Conference paper
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, 12-15 Sept. 2016
Authors:  Dante Gabriel Muratore;  Alper Akdikmen;  Edoardo Bonizzoni;  Franco Maloberti;  U-Fat Chio;  Sai-Weng Sin;  Rui Paulo Martins
Favorite |  | TC[WOS]:5 TC[Scopus]:7 | Submit date:2019/02/11