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A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N bang-bang digital PLL with 8-μs settling time for multi-ISM-Band ULP radios Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 9,Page: 3307-3316
Authors:  Un,Ka Fai;  Qi,Gengzhen;  Yin,Jun;  Yang,Shiheng;  Yu,Shupeng;  Ieong,Chio In;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:3 TC[Scopus]:3 | Submit date:2021/03/09
bang-bang  Digital phase-locked loop (DPLL)  digital-to-time converter (DTC)  gain calibration  ring VCO  ultra-fast settling  ultra-low-power (ULP)  voltage-controlled oscillator (VCO)