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A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Delta Sigma Modulator With Multirate Opamp Sharing Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 10,Page: 2641-2654
Authors:  Liang Qi;  Sai-Weng Sin;  Seng-Pan, U.;  Franco Maloberti;  Rui Paulo Martins
Favorite |  | TC[WOS]:12 TC[Scopus]:16 | Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Discrete-time (Dt) Delta Sigma (Delta Sigma) Modulator  Multi-stage Noise Shaping (Mash)  Wideband  Power-efficient  Opamp Sharing  Multirate  Successive Approximation Register (Sar) Quantizer  
A Digital PWM Controlled KY Step-Up Converter based on Passive Sigma-Delta Modulator Conference paper
2017 IEEE 3rd International Future Energy Electronics Conference and ECCE Asia, IFEEC - ECCE Asia 2017, Kaohsiung, Taiwan, JUN 03-07, 2017
Authors:  Xia Du;  Chi-Seng Lam;  Sai-Weng Sin;  Franco Maloberti;  Man-Chung Wong;  Seng-Pan U;  Rui Paulo Martins
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2018/12/23
Digital Control  Ky Converter  Sigma-delta Modulator  
Reconfigurable mismatch-free time-interleaved bandpass sigma-delta modulator for wireless communications Journal article
ELECTRONICS LETTERS, 2017,Volume: 53,Issue: 7,Page: 506–508
Authors:  Dongyang Jiang;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2018/10/30
Sigma-delta Modulation  Modulators  Software Radio  Radio Receivers  Circuit Simulation  Band-pass Filters  Table Lookup  Reconfigurable Mismatch-free Time-interleaved Bandpass Sigma-delta Modulator  Wireless Communications  Control Parameters  Look-up Table  Path Numbers  Path Sampling Frequencies  Tuning Coefficients  Design Reconfigurability  Multiband Receiver  Software Defined Radio Systems  Behavioural Simulations  
A High DR Multi-Channel Stage-Shared Hybrid Front-End for Integrated Power Electronics Controller Conference paper
2016 IEEE Asian Solid-State Circuits Conference (A-SSCC), Toyama, JAPAN, 7-9 Nov. 2016
Authors:  Yuan Ren;  Sai-Weng Sin;  Chi-Seng Lam;  Man-Chung Wong;  Seng-Pan U;  Rui Paulo Martins
Favorite |  | TC[WOS]:6 TC[Scopus]:4 | Submit date:2018/12/23
Multi-channel Sigma Delta Front-end Interface  Programmable-gain  Integrated Pe Controller  
Active-Passive Delta Sigma Modulator for High-Resolution and Low-Power Applications Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017,Volume: 25,Issue: 1,Page: 364-374
Authors:  Hussain, Arshad;  Sin, Sai-Weng;  Chan, Chi-Hang;  U, Seng-Pan (Ben);  Maloberti, Franco;  Martins, Rui P.
Favorite |  | TC[WOS]:11 TC[Scopus]:12 | Submit date:2018/10/30
Delta-Sigma Modulator (Delta Sigma m)  Discrete Time (Dt)  Low-gain-amplifier-based Switched-capacitor (Sc) Integrator  Noise Shaping  Passive Sc Integrator  
Resolution-enhanced sturdy MASH delta-sigma modulator for wideband low-voltage applications Journal article
Electronics Letters, 2015,Volume: 51,Issue: 14,Page: 1061-1063
Authors:  Liang Qi;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite |  | TC[WOS]:4 TC[Scopus]:7 | Submit date:2019/02/11
Time interleaved current steering DAC for ultra-high conversion rate Conference paper
Conference Proceedings - 10th Conference on Ph. D. Research in Microelectronics and Electronics, PRIME 2014, Grenoble, FRANCE, JUN 29-JUL 03, 2014
Authors:  Feng D.;  Sin S.-W.;  Bonizzoni E.;  Maloberti F.
Favorite |  | TC[WOS]:0 TC[Scopus]:1 | Submit date:2019/02/14
Jitter-resistant Capacitor Based Sine-Shaped DAC for Continuous-Time Sigma-Delta modulators Conference paper
2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, AUSTRALIA, JUN 01-05, 2014
Authors:  Da Feng;  Franco Maloberti;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2019/02/11
Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters Journal article
Analog Integrated Circuits and Signal Processing, 2013,Volume: 76,Issue: 1,Page: 35-46
Authors:  Chen-Yan Cai;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/11
Ct Δς Modulator  Excess-loop-delay Compensation Techniques For Hybrid Active-passive Loop-filter  Excess-loop-delay For Hybrid Active-passive Loop-filter  Hybrid Active-passive Loop-filter  
A continuous-time VCO-assisted VCO-based ΣΔ modulator with 76.6dB SNDR and 10MHz BW Conference paper
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, PEOPLES R CHINA, MAY 19-23, 2013
Authors:  Yun Du;  Tao He;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite |  | TC[WOS]:0 TC[Scopus]:2 | Submit date:2019/02/11