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A 7-bit 2 GS/s Time-Interleaved SAR ADC with Timing Skew Calibration Based on Current Integrating Sampler Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021,Volume: 68,Issue: 2,Page: 557-568
Authors:  Jiang,Wenning;  Zhu,Yan;  Chan,Chi Hang;  Murmann,Boris;  Martins,Rui Paulo
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/03/04
Analog-to-digital converter  background timing skew calibration  current integrating sampler  SAR ADC  time-interleaved ADC  timing skew  
An 8-Bit 10-GS/s 16× Interpolation-Based Time-Domain ADC with <1.5-ps Uncalibrated Quantization Steps Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 12,Page: 3225-3235
Authors:  Zhang,Minglei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/04
Analog-to-digital converter (ADC)  and temperature (PVT) robustness  high-speed ADC  metastability  process  supply voltage  time interpolation  time residue  time-domain ADC  time-to-digital converter (TDC)  
A 4× Interleaved 10GS/s 8b Time-Domain ADC with 16× Interpolation-Based Inter-Stage Gain Achieving >37.5dB SNDR at 18GHz Input Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Zhang,Minglei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:4 | Submit date:2021/03/04
A 0.6-V 13-bit 20-MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques Journal article
IEEE Journal of Solid-State Circuits, 2019,Volume: 54,Issue: 12,Page: 3396-3409
Authors:  Zhang,Minglei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite |  | TC[WOS]:5 TC[Scopus]:6 | Submit date:2021/03/09
Analog-to-digital converter (ADC)  and temperature (PVT) robustness  low power supply  process  successive approximation register (SAR)  threshold crossing detector  time residue generator (TRG)  time-domain ADC  time-to-digital converter (TDC)  two-step TDC  voltage  voltage-to-time converter (VTC)  
A 4-b 7-μ W phase domain ADC with time domain reference generation for low-power FSK/PSK Demodulation Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 9,Page: 3365-3372
Authors:  Lei,Xuewei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui Paulo
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/09
Bluetooth low energy (BLE)  frequency-shift keying (FSK)  low power  phase ADC  
3.5 A 0.6V 13b 20MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Zhang,Minglei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:9 | Submit date:2021/03/09
A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler Conference paper
2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings
Authors:  Jiang W.;  Zhu Y.;  Chan C.-H.;  Murmann B.;  Seng-Pan U.;  Martins R.P.
Favorite |  | TC[WOS]:0 TC[Scopus]:3 | Submit date:2019/02/11
background calibration  current integrating sampler  Time-interleaved ADC  timing skew  
A 4x time-domain interpolation 6-bit 3.4 Gs/s 12.6 mw flash ADC in 65 nm CMOS Journal article
Journal of Semiconductor Technology and Science, 2016,Volume: 16,Issue: 4,Page: 395-404
Authors:  Jianwei Liu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2019/02/11
4x Time-domain Interpolation  Flash Adc  Sr-latch  Time Comparator  
Low-Power CMOS Laser Doppler Imaging Using Non-CDS Pixel Readout and 13.6-bit SAR ADC Journal article
IEEE Transactions on Biomedical Circuits and Systems, 2016,Volume: 10,Issue: 1,Page: 186-199
Authors:  Chen D.G.;  Law M.-K.;  Lian Y.;  Bermak A.
Favorite |  | TC[WOS]:4 TC[Scopus]:4 | Submit date:2019/02/14
Cmos Image Sensor  Correlated Double Sampling (Cds)  Flowmetry  Laser Doppler Imaging (Ldi)  Perfusion  Successive-approximation-register Analog-to-digital-converter (Sar Adc)  Time-domain Comparator  
A 89fJ-FOM 6-bit 3.4GS/s flash ADC with 4x time-domain interpolation Conference paper
2015 IEEE Asian Solid-State Circuits Conference (A-SSCC), Xiamen Int C Ctr (XICC), Xiamen, PEOPLES R CHINA, 9-11 Nov. 2015
Authors:  Jianwei Liu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite |  | TC[WOS]:14 TC[Scopus]:17 | Submit date:2019/02/11