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Near-Optimal Decoding of Incremental Delta-Sigma ADC Output Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 3670-3680
Authors:  Wang,Bo;  Law,Man Kay;  Belhaouari,Samir Brahim;  Bermak,Amine
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/03/11
decimation filter  delta-sigma modulator  IDC  incremental ADC  noise penalty factor  optimal filter  Reconstruction filter  thermal noise averaging  
A 550μ W 20-kHz BW 100.8-dB SNDR Linear- Exponential Multi-Bit Incremental ΣΔ ADC with 256 Clock Cycles in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2019,Volume: 54,Issue: 4,Page: 1161-1172
Authors:  Wang,Biao;  Sin,Sai Weng;  Seng-Pan,S. P.U.;  Maloberti,Franco;  Martins,Rui P.
Favorite |  | TC[WOS]:10 TC[Scopus]:11 | Submit date:2021/03/09
Analog-to-digital converter (ADC)  data weighting average  dynamic element matching (DEM)  high linearity  incremental ADC (IADC)  linear-exponential accumulation  mismatch error  multi-bit  notch  sigma delta  two phase