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LDO-Free Power Management System: A 10-bit Pipelined ADC Directly Powered by Inductor-Based Boost Converter with Ripple Calibration Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 12,Page: 4174-4186
Authors:  Wang,Hanyu;  Sin,Sai Weng;  Lam,Chi Seng;  Maloberti,Franco;  Martins,Rui Paulo
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/04
analog-to-digital converters (ADCs)  boost DC-DC converters  pipelined ADC  Power management  ripple calibration  switching-mode power converters  
A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 12,Page: 4850-4861
Authors:  Fan,Chao;  Yu,Wei Han;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:3 TC[Scopus]:1 | Submit date:2021/03/09
CMOS  current-mode-logic (CML) driver  feed-forward equalization (FFE)  four-level pulse-amplitude modulation (PAM-4)  source-series-terminated (SST) driver  SST-CML-Hybrid (SCH) driver  transmitter (TX)  
A Switched-Capacitor DC-DC Converter with Unequal Duty Cycle for Ripple Reduction and Efficiency Improvement Conference paper
2019 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2019 - Proceedings
Authors:  Wu,Yulun;  Mustafa,Yerzhan;  Lu,Yan;  Ruderman,Alex;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:2 | Submit date:2021/03/09
ripple reduction  switched-capacitor DC-DC converter  switching mode power supply  unequal duty cycle  
A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018,Volume: 53,Issue: 3,Page: 850-860
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Zhang, Wai-Hong;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite |  | TC[WOS]:20 TC[Scopus]:27 | Submit date:2018/10/30
1-then-2 B/cycle Sar Adc  Analog-to-digital Conversion  Background Offset Calibration  Multi-bit/cycle Sar Adc  Time Interleaving  
A digitally controlled pseudo-hysteretic buck converter for low power biomedical implants Conference paper
Qatar Foundation Annual Research Conference Proceedings 2016, Qatar, March 22, 2016 - March 23, 2016
Authors:  Paul Jung-Ho Lee;  Amine Bermak;  Man Kay Law
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/03/27
Cyber security and privacy issues in smart grids Journal article
IEEE Communications Surveys and Tutorials, 2012,Volume: 14,Issue: 4,Page: 981
Authors:  Liu J.;  Xiao Y.;  Li S.;  Liang W.;  Chen C.L.P.
View | Adobe PDF | Favorite |  | TC[WOS]:269 TC[Scopus]:325 | Submit date:2018/10/30
Accountability  Ami  Privacy  Scada  Security  Smart Grid  
A rapid power-switchable track-and-hold amplifier in 90-nm CMOS Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2010,Volume: 57,Issue: 1,Page: 16
Authors:  He-Gong Wei;  U-Fat Chio;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
Favorite |  | TC[WOS]:14 TC[Scopus]:16 | Submit date:2018/10/30
High-accuracy  High-speed  Power Switchable  Track-and-hold (T/h)  
A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2010,Volume: 45,Issue: 6,Page: 1111-1121
Authors:  Yan Zhu;  Chi-Hang Chan;  U-Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite |  | TC[WOS]:415 TC[Scopus]:457 | Submit date:2018/10/30
Charge-recovery  Reference-free  Switched Technique