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An 8-Bit 10-GS/s 16× Interpolation-Based Time-Domain ADC with <1.5-ps Uncalibrated Quantization Steps Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 12,Page: 3225-3235
Authors:  Zhang,Minglei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/04
Analog-to-digital converter (ADC)  and temperature (PVT) robustness  high-speed ADC  metastability  process  supply voltage  time interpolation  time residue  time-domain ADC  time-to-digital converter (TDC)  
A 1.6-GS/s 12.2-mW Seven-/Eight-Way Split Time-Interleaved SAR ADC Achieving 54.2-dB SNDR with Digital Background Timing Mismatch Calibration Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 3,Page: 693-705
Authors:  Guo,Mingqiang;  Mao,Jiaji;  Sin,Sai Weng;  Wei,Hegong;  Martins,Rui P.
Favorite |  | TC[WOS]:2 TC[Scopus]:4 | Submit date:2021/03/04
Analog-to-digital converter (ADC)  digital background calibration  split ADC  time-interleaved (TI) ADC  timing-skew mismatch  
A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC with Dynamic Gm-R-Based Amplifier Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 2,Page: 322-332
Authors:  Jiang,Wenning;  Zhu,Yan;  Zhang,Minglei;  Chan,Chi Hang;  Martins,Rui Paulo
Favorite |  | TC[WOS]:3 TC[Scopus]:4 | Submit date:2021/03/09
Analog-to-digital converter (ADC)  Gm-R amplifier  pipelined-successive approximation register (SAR) ADC  residue amplifier (RA)  SAR  SAR-assisted pipelined ADC  temperature compensation  
A 12.5-MHz Bandwidth 77-dB SNDR SAR-Assisted Noise Shaping Pipeline ADC Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 2,Page: 312-321
Authors:  Song,Yan;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite |  | TC[WOS]:5 TC[Scopus]:5 | Submit date:2021/03/09
Alternative loading capacitor (ALC)  analog-to-digital converter (ADC)  multiplying digital-to-analog converter (MDAC) reusing  noise shaping (NS)  successive approximation register (SAR)-assisted pipeline  
A 2.56mW 40MHz-Bandwidth 75dB-SNDR Partial-Interleaving SAR-Assisted NS Pipeline ADC with Background Inter-Stage Offset Calibration Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Song,Yan;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui Paulo
Favorite |  | TC[WOS]:0 TC[Scopus]:3 | Submit date:2021/03/04
A 4× Interleaved 10GS/s 8b Time-Domain ADC with 16× Interpolation-Based Inter-Stage Gain Achieving >37.5dB SNDR at 18GHz Input Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Zhang,Minglei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:4 | Submit date:2021/03/04
3.5 A 0.6V 13b 20MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Zhang,Minglei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:9 | Submit date:2021/03/09
3.2 A 7.6mW 1GS/s 60dB SNDR Single-Channel SAR-Assisted Pipelined ADC with Temperature-Compensated Dynamic Gm-R-Based Amplifier Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Jiang,Wenning;  Zhu,Yan;  Zhang,Minglei;  Chan,Chi Hang;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:10 | Submit date:2021/03/09
Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC with Optimal Code Transfer Technique Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 2,Page: 489-501
Authors:  Xing D.;  Zhu Y.;  Chan C.-H.;  Maloberti F.;  Seng-Pan U.;  Martins R.P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/11
reference interference  SAR ADC  time-interleaved scheme  two-step SAR conversion  
Analysis of Reference Error in High-Speed SAR ADCs With Capacitive DAC Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019,Volume: 66,Issue: 1,Page: 82-93
Authors:  Li, Cheng;  Chan, Chi-Hang;  Zhu, Yan;  Martins, Rui P.
Favorite |  | TC[WOS]:3 TC[Scopus]:5 | Submit date:2019/01/17
Reference error  reference buffer  successive-approximation-register (SAR)  analog-to-digital converter (ADC)  reference ripple