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Review of Analog-Assisted-Digital and Digital-Assisted-Analog Low Dropout Regulators Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2021,Volume: 68,Issue: 1,Page: 24-29
Authors:  Huang,Mo;  Lu,Yan;  Martins,Rui P.
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analog-assisted-digital  digital-assisted-analog  Low dropout regulator  power supply rejection  transient response  
An NMOS Digital LDO with NAND-Based Analog-Assisted Loop in 28-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 4041-4052
Authors:  Ma,Xiaofei;  Lu,Yan;  Li,Qiang;  Ki,Wing Hung;  Martins,Rui P.
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Analog assisted (AA)  coarse/fine tuning  digital control  digital low-dropout regulator (LDO)  fully integrated voltage regulator (FIVR)  limit cycle oscillation (LCO)  NMOS LDO  nonlinear control  output-capacitor-free  
A SAR-ADC-Assisted DC-DC Buck Converter with Fast Transient Recovery Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2020,Volume: 67,Issue: 9,Page: 1669-1673
Authors:  Zeng,Wen Liang;  Bonizzoni,Edoardo;  Wu,Chi Wa;  Lam,Chi Seng;  Sin,Sai Weng;  Chio,U. Fat;  Maloberti,Franco;  Martins,Rui Paulo
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ADC  additional loop compensation  bond-wire inductor  buck converter  current pump  DCM  fast transient recovery  
A 12.5-MHz Bandwidth 77-dB SNDR SAR-Assisted Noise Shaping Pipeline ADC Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 2,Page: 312-321
Authors:  Song,Yan;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
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Alternative loading capacitor (ALC)  analog-to-digital converter (ADC)  multiplying digital-to-analog converter (MDAC) reusing  noise shaping (NS)  successive approximation register (SAR)-assisted pipeline  
A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC with Dynamic Gm-R-Based Amplifier Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 2,Page: 322-332
Authors:  Jiang,Wenning;  Zhu,Yan;  Zhang,Minglei;  Chan,Chi Hang;  Martins,Rui Paulo
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Analog-to-digital converter (ADC)  Gm-R amplifier  pipelined-successive approximation register (SAR) ADC  residue amplifier (RA)  SAR  SAR-assisted pipelined ADC  temperature compensation  
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH with DAC Non-Linearity Tolerance Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 2,Page: 344-355
Authors:  Qi,Liang;  Jain,Ankesh;  Jiang,Dongyang;  Sin,Sai Weng;  Martins,Rui P.;  Ortmanns,Maurits
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Analog-to-digital converter (ADC)  continuous time (CT)  digital-to-analog converter (DAC) linearization  excess loop delay (ELD) compensation  filter  finite-impulse response (FIR)  multibit quantization  noise coupling (NC)  sturdy multistage noise-shaping (SMASH)  successive-approximation register (SAR)  
A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC Journal article
IEEE Journal of Solid-State Circuits, 2020
Authors:  Song,Yan;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui P.
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Analog-to-digital converter (ADC)  Calibration  Capacitors  Gain  noise-shaping (NS)  offset calibration  Pipelines  Registers  successive approximation register (SAR)-assisted pipeline  System-on-chip  time interleaving.  Transfer functions  
A 0.6-V 13-bit 20-MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques Journal article
IEEE Journal of Solid-State Circuits, 2019,Volume: 54,Issue: 12,Page: 3396-3409
Authors:  Zhang,Minglei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
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Analog-to-digital converter (ADC)  and temperature (PVT) robustness  low power supply  process  successive approximation register (SAR)  threshold crossing detector  time residue generator (TRG)  time-domain ADC  time-to-digital converter (TDC)  two-step TDC  voltage  voltage-to-time converter (VTC)  
A 4-b 7-μ W phase domain ADC with time domain reference generation for low-power FSK/PSK Demodulation Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 9,Page: 3365-3372
Authors:  Lei,Xuewei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui Paulo
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Bluetooth low energy (BLE)  frequency-shift keying (FSK)  low power  phase ADC  
20.5 A 76.6dB-SNDR 50MHz-BW 29.2mW Noise-Coupling-Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOS Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Qi,Liang;  Jain,Ankesh;  Jiang,Dongyang;  Sin,Sai Weng;  Martins,Rui P.;  Ortmanns,Maurits
Favorite |  | TC[WOS]:0 TC[Scopus]:4 | Submit date:2021/03/09