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A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation Journal article
IEEE Journal of Solid-State Circuits, 2021,Volume: 56,Issue: 8,Page: 2375-2387
Authors:  Jiang, Dongyang;  Qi, Liang;  Sin, Sai Weng;  Maloberti, Franco;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/09/20
Analog-to-digital converter (ADC)  data weighting average (DWA)  delta-sigma modulator (DSM)  digital bank filters  digital-to-analog converter (DAC)  discrete-time (DT)  dithering  dynamic element matching (DEM)  extrapolation  noise-coupling  time-domain analysis  time-interleaved (TI)  
Discrete-time mash delta-sigma modulator with second-order digital noise coupling for wideband high-resolution applications Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems
Authors:  Qin, Xinyu;  Zhang, Jingying;  Qi, Liang;  Sin, Sai Weng;  Martins, Rui P.;  Wang, Guoxing
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/09/20
Digital noise coupling  Multistage noise shaping (MASH)  Noise leakage  Wideband high-resolution applications  ΔΣ modulator (DSM)  
A Single-Opamp Third Order CT Δ Σ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2021
Authors:  Xing, Kai;  Wang, Wei;  Zhu, Yan;  Chan, Chi Hang;  Martins, Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/09/20
Analog-to-digital conversion (ADC)  continuous-time delta-sigma modulator (CTDSM)  Gain  high-speed noise-shaping SAR (NS-SAR).  Loading  Low-frequency noise  Modulation  preliminary sampling and quantization (PSQ) technique  Quantization (signal)  SAB-ELD-merged integrator  three-stage Opamp  Topology  Wideband  
Near-Optimal Decoding of Incremental Delta-Sigma ADC Output Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020,Volume: 67,Issue: 11,Page: 3670-3680
Authors:  Wang,Bo;  Law,Man Kay;  Belhaouari,Samir Brahim;  Bermak,Amine
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2021/03/11
decimation filter  delta-sigma modulator  IDC  incremental ADC  noise penalty factor  optimal filter  Reconstruction filter  thermal noise averaging  
A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 6,Page: 1588-1598
Authors:  Wang,Wei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:1 | Submit date:2020/12/04
Analog-to-digital conversion (ADC)  continuous-time delta-sigma modulator (CT-DSM)  preliminary sampling and quantization (PSQ) technique  single amplifier biquad (SAB)  successiveapproximation-register (SAR) architecture-based quantizer (QTZ)  
A High DR High-Input-Impedance Programmable-Gain ECG Acquisition Interface with Non-inverting Continuous Time Sigma-Delta Modulator Conference paper
Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019
Authors:  Liang,Junhao;  Sin,Sai Weng;  Seng-Pan,U.;  Maloberti,Franco;  Martins,R. P.;  Jiang,Hanjun
Favorite |  | TC[WOS]:0 TC[Scopus]:0 | Submit date:2021/03/09
CT sigma delta AD converter  ECG  high impedance  non-invertering integrator  Programmable integrator  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Delta Sigma Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Conference paper
Authors:  Wang, Wei;  Zhu, Yan;  Chan, Chi-Hang;  Martins, Rui Paulo
Favorite |  | TC[WOS]:5 TC[Scopus]:6 | Submit date:2018/10/30
Terms-Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 10,Page: 2783-2794
Authors:  Wang,Wei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui Paulo
Favorite |  | TC[WOS]:5 TC[Scopus]:6 | Submit date:2019/08/22
Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 10,Page: 2783-2794
Authors:  Wang W.;  Zhu Y.;  Chan C.-H.;  Martins R.P.
Favorite |  | TC[WOS]:5 TC[Scopus]:6 | Submit date:2019/02/11
Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 10-MHz Bandwidth Two-Path Third-Order Sigma Delta Modulator With Cross-Coupling Branches Conference paper
Authors:  Feng, Da;  Bonizzoni, Edoardo;  Maloberti, Franco;  Sin, Sai-Weng;  Martins, Rui Paulo
Favorite |  | TC[WOS]:1 TC[Scopus]:1 | Submit date:2018/10/30
Sigma Delta modulator  two-path  cross-coupling  noise transfer function  polyphase decomposition