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A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector Journal article
IEEE Access, 2020,Volume: 8,Page: 2222-2232
Authors:  Yang,Zunsong;  Chen,Yong;  Yang,Shiheng;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:4 TC[Scopus]:4 | Submit date:2021/03/09
CMOS  divider-by-4  dual loop  dynamic latch  figure-of-merit (FoM)  frequency detector (FD)  millimeter (mm)-wave  phase detector (PD)  phase-locked loop (PLL)  voltage-controlled oscillator (VCO)  voltage-to-current converter (VIC)  
A 0.0018-mm2 153% locking-range CML-Based divider-by-2 with tunable self-resonant frequency using an auxiliary negative-gm Cell Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 9,Page: 3330-3339
Authors:  Zhao,Xiaoteng;  Chen,Yong;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:4 TC[Scopus]:5 | Submit date:2021/03/09
5G New Radio  CMOS  current-mode-logic (CML)  divider-by-2  injection locking  latch  locking range (LR)  negative-gm (NG)  phasor diagram  self-resonant frequency (fSR)  sensitivity curve (SC)  shunt peaking  
A 6.5 ×7μ m2 0.98-to-1.5 mW Nonself-Oscillation-Mode Frequency Divider-by-2 Achieving a Single-Band Untuned Locking Range of 166.6% (4-44 GHz) Journal article
IEEE Solid-State Circuits Letters, 2019,Volume: 2,Issue: 5,Page: 37-40
Authors:  Chen,Yong;  Yang,Zunsong;  Zhao,Xiaoteng;  Huang,Yunbo;  Mak,Pui In;  Martins,Rui P.
Favorite |  | TC[WOS]:0 TC[Scopus]:6 | Submit date:2021/03/09
5G bands  current-mode-logic (CML)  figure-of-merit (FOM)  frequency divider  locking range (LR)  non-self-oscillation-mode (NSOM)  phasor  self-oscillation-mode (SOM)  
An open-loop octave-phase local-oscillator generator with high-precision correlated phases for VHF/UHF mobile-TV tuners Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Taipei, TAIWAN, MAY 24-27, 2009
Authors:  Un K.-F.;  Mak P.-I.;  Martins R.P.
Favorite |  | TC[WOS]:1 TC[Scopus]:2 | Submit date:2019/02/11