Double recycling technique for folded-cascode OTA
Zushu Yan1; Pui-In Mak1; R. P. Martins1,2
Source PublicationAnalog Integrated Circuits and Signal Processing

Presented is a double-recycling folded cascode (DRFC) operational transconductance amplifier (OTA), demonstrating another phase of significant performance enhancement over the existing folded cascode, recycling folded cascode and improved recycling folded cascode counterparts. Theoretical treatments and computer simulations under the same 65 nm CMOS technology justify fairly the merits of the proposed DRFC OTA. © 2011 Springer Science+Business Media, LLC.

KeywordOperational Transconductance Amplifier (Ota) Current Recycling Folded-cascode Cmos
URLView the original
Indexed BySCIE
WOS Research AreaComputer Science ; Engineering
WOS SubjectComputer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS IDWOS:000301376100017
The Source to ArticleScopus
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Cited Times [WOS]:38   [WOS Record]     [Related Records in WOS]
Document TypeJournal article
CollectionUniversity of Macau
Corresponding AuthorPui-In Mak
Affiliation1.State-Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China
2.Instituto Superior Te´cnico (IST)/TU of Lisbon, Lisbon, Portugal
First Author AffilicationUniversity of Macau
Corresponding Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Zushu Yan,Pui-In Mak,R. P. Martins. Double recycling technique for folded-cascode OTA[J]. Analog Integrated Circuits and Signal Processing,2012,71(1):137-141.
APA Zushu Yan,Pui-In Mak,&R. P. Martins.(2012).Double recycling technique for folded-cascode OTA.Analog Integrated Circuits and Signal Processing,71(1),137-141.
MLA Zushu Yan,et al."Double recycling technique for folded-cascode OTA".Analog Integrated Circuits and Signal Processing 71.1(2012):137-141.
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