Limit cycle oscillation reduction for digital low dropout regulators
Mo Huang; Yan Lu; Sai Wang Sin; Seng Pan U; Rui Paulo da Silva Martins
Rights HolderUNIVERSITY OF MACAU
Date Available2018-04-17
CountryUnited States
Subtype发明专利
Contribution Rank1
Abstract

A method achieves minimum limit cycle oscillation (LCO) amplitude of a digital low dropout regulator (D-LDO) by adding auxiliary unit power transistors in parallel with the main PMOS array with selected unit strength and LCO mode. An improved D-LDO with reduced LCO amplitude includes an auxiliary power transistor array in selected strength driven by an output of a comparator in parallel with a main power transistor array.

Application Date2017-02-08
Patent NumberUS9946281B1
Language英語English
Application NumberUS15427059
Open (Notice) NumberUS9946281B1
Fulltext Access
Document TypePatent
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
INSTITUTE OF MICROELECTRONICS
Affiliation澳門大學
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Mo Huang,Yan Lu,Sai Wang Sin,et al. Limit cycle oscillation reduction for digital low dropout regulators. US9946281B1.
APA Mo Huang,Yan Lu,Sai Wang Sin,Seng Pan U,&Rui Paulo da Silva Martins.
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