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A digitally-controlled 2-/3-phase 6-ratio switched- capacitor DC-DC converter with adaptive ripple reduction and efficiency improvements
Jiang J.1; Lu Y.2; Ki W.-H.1
2016-10-18
Conference Name46th European Solid-State Device Research Conference (ESSDERC) / 42nd European Solid-State Circuits Conference (ESSCIRC)
Source PublicationEuropean Solid-State Circuits Conference
Volume2016-October
Pages441-444
Conference DateSEP 12-15, 2016
Conference PlaceLausanne, SWITZERLAND
Abstract

A digitally controlled 2-/3-phase 6-ratio switched-capacitor (SC) DC-DC converter with low output voltage ripple and high efficiency is presented. Operating with a wide input voltage range of 1.6V to 3.3V, this SC converter can deliver a maximum power of 250mW to an output of 0.5V to 3V. Six voltage conversion ratios (VCRs) can be generated with only 2 flying capacitors by using 2- or 3-phase operation. Compared with a 2-phase SC converter, the maximum efficiency improvement is 20%. An adaptive ripple reduction scheme is proposed to achieve 4 times reduction in the output voltage ripple. Complexity of controller design is reduced by using digital synthesis and the technique is scalable. Fast loop response is achieved by synchronized hysteretic control. The converter achieves a peak efficiency of 91%.

DOI10.1109/ESSCIRC.2016.7598336
URLView the original
Indexed BySCIE
Language英語English
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000386656300107
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Cited Times [WOS]:3   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
CollectionINSTITUTE OF MICROELECTRONICS
Affiliation1.Hong Kong University of Science and Technology
2.Universidade de Macau
Recommended Citation
GB/T 7714
Jiang J.,Lu Y.,Ki W.-H.. A digitally-controlled 2-/3-phase 6-ratio switched- capacitor DC-DC converter with adaptive ripple reduction and efficiency improvements[C],2016:441-444.
APA Jiang J.,Lu Y.,&Ki W.-H..(2016).A digitally-controlled 2-/3-phase 6-ratio switched- capacitor DC-DC converter with adaptive ripple reduction and efficiency improvements.European Solid-State Circuits Conference,2016-October,441-444.
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