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A robust 3rd order low-distortion multi-bit sigma-delta modulator with reduced number of Op-amps for WCDMA
Chio K.-S.1; U S.-P.1; Martins R.P.2
2005-12-01
Conference NameIEEE International Symposium on Circuits and Systems (ISCAS)
Source PublicationProceedings - IEEE International Symposium on Circuits and Systems
Pages3099-3102
Conference DateMAY 23-26, 2005
Conference PlaceKobe, JAPAN
Abstract

This paper describes a novel single-loop multi-bit (3 bits) sigma-delta modulator (SDM) with reduced number of op-amps for wideband WCDMA. Such architecture is based in a simplified analog structure that not only features low distortion but also provides an aggressive and significantly enlarged noise shaping bandwidth with low over-sampling ratio (OSR). With a sampling frequency of 39MHz and an OSR of 10 the proposed circuit can achieve 74dB SFDR. © 2005 IEEE.

DOI10.1109/ISCAS.2005.1465283
URLView the original
Indexed BySCIE
Language英語English
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000232002403021
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Cited Times [WOS]:1   [WOS Record]     [Related Records in WOS]
Document TypeConference paper
CollectionFaculty of Science and Technology
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Affiliation1.Universidade de Macau
2.Instituto Superior Técnico
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Chio K.-S.,U S.-P.,Martins R.P.. A robust 3rd order low-distortion multi-bit sigma-delta modulator with reduced number of Op-amps for WCDMA[C],2005:3099-3102.
APA Chio K.-S.,U S.-P.,&Martins R.P..(2005).A robust 3rd order low-distortion multi-bit sigma-delta modulator with reduced number of Op-amps for WCDMA.Proceedings - IEEE International Symposium on Circuits and Systems,3099-3102.
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