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A 2-μW 45-nV/√Hz Readout Front End with Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2016,Volume: 63,Issue: 4,Page: 351-355
Authors:  Jiangchao Wu;  Man-Kay Law;  Pui-In Mak;  Rui P. Martins
Favorite  |  View/Download:12/0  |  Submit date:2019/02/11
Capacitively Coupled Instrumentation Amplifier (Ccia)  Dc Servo Loop (Dsl)  Multiple Chopping  Neural Recording Front End  Pseudofeedback Amplifier  Ripple Reduction Loop (Rrl)  
A 0.0045-mm2 32.4-μW Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2015,Volume: 62,Issue: 3,Page: 246-250
Authors:  Zushu Yan;  Wei Wang;  Pui-In Mak;  Man-Kay Law;  Rui P. Martins
Favorite  |  View/Download:17/0  |  Submit date:2019/02/11
Capacitive Load  Capacitor Multiplier  Cmos  Frequency Compensation  Stability  Two-stage Amplifier