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A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC Conference paper
2012 Symposium on VLSI Circuits Digest of Technical Papers, Honolulu, HI, USA, 13-15 June 2012
Authors:  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite  |  View/Download:14/0  |  Submit date:2019/02/11
Design techniques for nanometer wideband power-efficient CMOS ADCs Conference paper
2011 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2011, Beijing, China, 30 Nov.-2 Dec. 2011
Authors:  Seng-Pan U.;  Sin S.-W.;  Zhu Y.;  Chio U.-F.;  Wei H.-G.;  Martins R.P.
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Analog-to-digital Converters  Nanometer Cmos  Successive Approximation