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A power scalable 6-bit 1.2GS/s flash ADC with power on/off track-and-hold and preamplifier Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Seattle, WA, MAY 18-21, 2008
作者:  Wei H.-G.;  Chio U.-F.;  Zhu Y.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
收藏  |  浏览/下载:11/0  |  提交时间:2019/02/11
A power-efficient 1.056 GS/s resolution-switchable 5-bit/6-bit flash ADC for UWB applications Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Kos, GREECE, MAY 21-24, 2006
作者:  Ma J.-X.;  Sin S.-W.;  U S.-P.;  Martins R.P.
收藏  |  浏览/下载:4/0  |  提交时间:2019/02/11
A novel low-voltage finite-gain compensation technique for high-speed reset- and switched-opamp circuits Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Kos, GREECE, MAY 21-24, 2006
作者:  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
收藏  |  浏览/下载:4/0  |  提交时间:2019/02/11
A novel very low-voltage SC-CMFB technique for fully-differential reset-opamp circuits Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Kobe, JAPAN, MAY 23-26, 2005
作者:  Sin S.-W.;  U S.-P.;  Martins R.P.
收藏  |  浏览/下载:5/0  |  提交时间:2019/02/11
A generalized timing-skew-free, multi-phase clock generation platform for parallel sampled-data systems Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Vancouver, BC, Canada, 5 23, 2004 - 5 26, 2004
作者:  Sin, Sai-Weng;  U, Seng-Pan;  Martins, R.P.
收藏  |  浏览/下载:5/0  |  提交时间:2018/11/06
Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, BANGKOK, THAILAND, MAY 25-28, 2003
作者:  Sin S.-W.;  Martins R.P.;  Franca J.E.;  Seng-Pan U
收藏  |  浏览/下载:4/0  |  提交时间:2019/02/11