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Defining the composition and electronic structure of large-scale and single-crystalline like Cs 2 AgBiBr 6 films fabricated by capillary-assisted dip-coating method Journal article
Materials Today Energy, 2019,Volume: 12,Page: 186-197
Authors:  Xiu J.;  Shao Y.;  Chen L.;  Feng Y.;  Dai J.;  Zhang X.;  Lin Y.;  Zhu Y.;  Wu Z.;  Zheng Y.;  Pan H.;  Liu C.;  Shi X.;  Cheng X.;  He Z.
Favorite  |  View/Download:15/0  |  Submit date:2019/04/08
Single-crystalline Perovskite Films  
Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC with Optimal Code Transfer Technique Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 2,Page: 489-501
Authors:  Xing D.;  Zhu Y.;  Chan C.-H.;  Maloberti F.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:8/0  |  Submit date:2019/02/11
reference interference  SAR ADC  time-interleaved scheme  two-step SAR conversion  
OTUB2 stabilizes U2AF2 to promote the Warburg effect and tumorigenesis via the AKT/mTOR signaling pathway in non-small cell lung cancer Journal article
THERANOSTICS, 2019,Volume: 9,Issue: 1,Page: 179-195
Authors:  Jing Li;  Dongdong Cheng;  Miaoxin Zhu;  Huajian Yu;  Zhen Pan;  Lei Liu;  Qin Geng;  Hongyu Pan;  Mingxia Yan;  Ming Yao
Favorite  |  View/Download:9/0  |  Submit date:2020/03/11
Deubiquitinating Enzyme  Otub2  Nsclc  Warburg Effect  U2af2  
A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler Conference paper
2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings
Authors:  Jiang W.;  Zhu Y.;  Chan C.-H.;  Murmann B.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
background calibration  current integrating sampler  Time-interleaved ADC  timing skew  
Gain Error Calibrations for Two-Step ADCs: Optimizations Either in Accuracy or Chip Area Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018,Volume: 26,Issue: 11,Page: 2279-2289
Authors:  Wang, Guan Cheng;  Zhu, Yan;  Chan, Chi-Hang;  Seng-Pan, U.;  Martins, Rui P.
Favorite  |  View/Download:14/0  |  Submit date:2019/01/17
Bridge digital-to-analog converter (DAC)  gain error calibration  successive approximation register (SAR)  analog-to-digital converters (ADCs)  testing signal generation (TSG)  
Probing Phase Evolutions of Au-Methyl-Propyl-Thiolate Self-Assembled Monolayers on Au(111) at the Molecular Level Journal article
JOURNAL OF PHYSICAL CHEMISTRY B, 2018,Volume: 122,Issue: 25,Page: 6666-6672
Authors:  Gao, Jianzhi;  Lin, Haiping;  Qin, Xuhui;  Zhang, Xin;  Ding, Haoxuan;  Wang, Yitao;  Fard, Mahroo Rokni;  Kaya, Dogan;  Zhu, Gangqiang;  Li, Qing;  Li, Youyong;  Pan, Minghu;  Guo, Quanmin
Favorite  |  View/Download:8/0  |  Submit date:2018/11/01
Endogenous synthesis of n-3 polyunsaturated fatty acids in fat-1 transgenic mice ameliorates streptozocin-induced diabetic nephropathy Journal article
JOURNAL OF FUNCTIONAL FOODS, 2018,Volume: 45,Page: 427-434
Authors:  Zhang, Yuan-Ming;  Zhang, Xiao-Hong;  Zhu, Pan;  Tan, Rong-Hui;  Zhao, Jin-Shun;  Wang, Feng;  Zhang, Jin-Jie;  Yan, Wang;  Xi, Yang;  Wan, Jian-Bo;  Kang, Jing-Xuan;  Zou, Zu-Quan;  Bu, Shi-Zhong
Favorite  |  View/Download:24/0  |  Submit date:2018/10/30
Fat-1  N-3 Pufas  Nlrp3 Inflammasome  Lipid Mediators  E-cadherin  Diabetic Nephropathy  
Analysis of common-mode interference and jitter of clock receiver circuits with improved topology Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 6,Page: 1819-1829
Authors:  Yang X.;  Zhu Y.;  Chan C.-H.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:11/0  |  Submit date:2019/02/11
Isf  Low Clock Jitter Circuit  Self-bias  
A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018,Volume: 53,Issue: 3,Page: 850-860
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Zhang, Wai-Hong;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:35/0  |  Submit date:2018/10/30
1-then-2 B/cycle Sar Adc  Analog-to-digital Conversion  Background Offset Calibration  Multi-bit/cycle Sar Adc  Time Interleaving  
A 16-mW 1-GS/s With 49.6-dB SNDR TI-SAR ADC for Software-Defined Radio in 65-nm CMOS Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018,Volume: 26,Issue: 3,Page: 572-583
Authors:  Qiu, Lei;  Tang, Kai;  Zheng, Yuanjin;  Siek, Liter;  Zhu, Yan;  U, Seng-Pan
Favorite  |  View/Download:28/0  |  Submit date:2018/10/30
Digital Background Calibration  Subradix-2  Successive Pproximation Register (Sar) Analog-to-digital Converters (Adcs)  Time Interleaved (Ti)  Time Skew