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A 220-MHz Bondwire-Based Fully-Integrated KY Converter With Fast Transient Response Under DCM Operation Conference paper
Authors:  Zeng, Wen-Liang;  Lam, Chi-Seng;  Sin, Sai-Weng;  Maloberti, Franco;  Wong, Man-Chung;  Martins, Rui Paulo
Favorite  |  View/Download:14/0  |  Submit date:2018/10/30
Fully integrated KY converter  boost converter  PWM  discontinuous conduction mode (DCM)  zero current detection (ZCD)  load transient response  voltage ripple  bondwire inductor  
A 14-Bit Split-Pipeline ADC With Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current Conference paper
Authors:  Mao, Jiaji;  Guo, Mingqiang;  Sin, Sai-Weng;  Martins, Rui Paulo
Favorite  |  View/Download:12/0  |  Submit date:2018/10/30
Analog-to-digital conversion  digital background calibration  pipelined ADC  split ADC  opamp-sharing technique  
A 10-MHz Bandwidth Two-Path Third-Order Sigma Delta Modulator With Cross-Coupling Branches Conference paper
Authors:  Feng, Da;  Bonizzoni, Edoardo;  Maloberti, Franco;  Sin, Sai-Weng;  Martins, Rui Paulo
Favorite  |  View/Download:15/0  |  Submit date:2018/10/30
Sigma Delta modulator  two-path  cross-coupling  noise transfer function  polyphase decomposition  
A Reconfigurable and Extendable Digital Architecture for Mixed Signal Power Electronics Controller Conference paper
Authors:  Wu, Ya-Jie;  Lam, Chi-Seng;  Wong, Man-Chung;  Sin, Sai-Weng;  Martins, Rui Paulo
Favorite  |  View/Download:9/0  |  Submit date:2018/10/30
Building block  digital controller  reconfigurable and extendable digital architecture  mixed signal PE controller  
Quick and cost-efficient A/D converter static characterization using low-precision testing signal Journal article
MICROELECTRONICS JOURNAL, 2018,Volume: 74,Page: 86-93
Authors:  Qin, Wei Wei;  Sin, Sai-Weng;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:12/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Static Characterization Estimation  Adc Testing  Ramp Testing  Nonlinear Input Signal  Attenuated Input Signal  
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Delta Sigma Modulator With Multirate Opamp Sharing Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 10,Page: 2641-2654
Authors:  Liang Qi;  Sai-Weng Sin;  Seng-Pan, U.;  Franco Maloberti;  Rui Paulo Martins
Favorite  |  View/Download:12/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Discrete-time (Dt) Delta Sigma (Delta Sigma) Modulator  Multi-stage Noise Shaping (Mash)  Wideband  Power-efficient  Opamp Sharing  Multirate  Successive Approximation Register (Sar) Quantizer  
A Digital PWM Controlled KY Step-Up Converter Based on Frequency Domain ΣΔ ADC Conference paper
IEEE International Symposium on Industrial Electronics, Edinburgh, UK, JUN 18-21, 2017
Authors:  Xia Du;  Chi-Seng Lam;  Sai-Weng Sin;  Man-Kay Law;  Franco Maloberti;  Man-Chung Wong;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:10/0  |  Submit date:2018/12/23
Frequency Domain Sigma-delta Adc  Ky Converter  Digital Control  
A 7.8-mW 5-b 5-GS/s Dual-Edges-Triggered Time-Based Flash ADC Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 8,Page: 1966-1976
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Sin, Sai-Weng;  Seng-Pan, U.;  Martins, Rui P.;  Maloberti, Franco
Favorite  |  View/Download:21/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Flash  Time-based Dual-edge-triggered  
A Digital PWM Controlled KY Step-Up Converter based on Passive Sigma-Delta Modulator Conference paper
2017 IEEE 3rd International Future Energy Electronics Conference and ECCE Asia, IFEEC - ECCE Asia 2017, Kaohsiung, Taiwan, JUN 03-07, 2017
Authors:  Xia Du;  Chi-Seng Lam;  Sai-Weng Sin;  Franco Maloberti;  Man-Chung Wong;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:6/0  |  Submit date:2018/12/23
Digital Control  Ky Converter  Sigma-delta Modulator  
A 12b 180MS/s 0.068mm(2) With Full-Calibration-Integrated Pipelined-SAR ADC Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 7,Page: 1684-1695
Authors:  Zhong, Jianyu;  Zhu, Yan;  Chan, Chi-Hang;  Sin, Sai-Weng;  U, Seng-Pan;  Martins, Rui Paulo
Favorite  |  View/Download:8/0  |  Submit date:2018/10/30
Analog-to-digital converter (ADC)  successive approximation architecture  low power  switched-capacitor circuits