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A digital microfluidic system with 3D microstructures for single-cell culture Journal article
Microsystems and Nanoengineering, 2020,Volume: 6,Issue: 1
Authors:  Zhai,Jiao;  Li,Haoran;  Wong,Ada Hang Heng;  Dong,Cheng;  Yi,Shuhong;  Jia,Yanwei;  Mak,Pui In;  Deng,Chu Xia;  Martins,Rui P.
Favorite | View/Download:251/0 | TC[WOS]:3 TC[Scopus]:4 | Submit date:2020/09/16
A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization Journal article
IEEE Journal of Solid-State Circuits, 2020,Volume: 55,Issue: 6,Page: 1588-1598
Authors:  Wang,Wei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite | View/Download:0/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2020/12/04
Analog-to-digital conversion (ADC)  continuous-time delta-sigma modulator (CT-DSM)  preliminary sampling and quantization (PSQ) technique  single amplifier biquad (SAB)  successiveapproximation-register (SAR) architecture-based quantizer (QTZ)  
Hydrodynamic-flow-enhanced rapid mixer for isothermal DNA hybridization kinetics analysis on digital microfluidics platform Journal article
SENSORS AND ACTUATORS B-CHEMICAL, 2019,Volume: 287,Page: 390-397
Authors:  Mingzhong Li;  Cheng Dong;  Man-Kay Law;  Yanwei Jia;  Pui-In Mak;  Rui P.Martins
Favorite | View/Download:11/0 | TC[WOS]:1 TC[Scopus]:1 | Submit date:2020/05/19
Dna Hybridization Kinetics  Digital Microfluidics  Hydrodynamic Flow  Isothermal  Rapid Mixing  
20.7 A 72.6dB-SNDR 100MHz-BW 16.36mW CTDSM with Preliminary Sampling and Quantization Scheme in Backend Subranging QTZ Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Authors:  Wang,Wei;  Chan,Chi Hang;  Zhu,Yan;  Martins,Rui P.
Favorite | View/Download:0/0 | TC[WOS]:0 TC[Scopus]:3 | Submit date:2020/12/04
27.3 A Piezoelectric Energy-Harvesting Interface Using Split Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy Extraction Improvement Conference paper
2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, USA, 17-21 Feb. 2019
Authors:  Zhiyuan Chen;  Yang Jiang;  Man-Kay Law;  Pui-In Mak;  Xiaoyang Zeng;  Rui P. Martins
Favorite | View/Download:76/0 | TC[WOS]:0 TC[Scopus]:7 | Submit date:2019/03/13
16.8 A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur Conference paper
2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, USA, 17-21 Feb. 2019
Authors:  Zunsong Yang;  Yong Chen;  Shiheng Yang;  Pui-In Mak;  Rui P. Martins
Favorite | View/Download:85/0 | TC[WOS]:0 TC[Scopus]:14 | Submit date:2019/03/13
26.2 A 0.08mm2 25.5-to-29.9GHz Multi-Resonant-RLCM-Tank VCO Using a Single-Turn Multi-Tap Inductor and CM-Only Capacitors Achieving 191.6dBc/Hz FoM and 130kHz 1/f3 PN Corner Conference paper
2019 IEEE International Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, USA, 17-21 Feb. 2019
Authors:  Hao Guo;  Yong Chen;  Pui-In Mak;  Rui P. Martins
Favorite | View/Download:62/0 | TC[WOS]:0 TC[Scopus]:11 | Submit date:2019/03/13
A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2019,Page: 1 - 12
Authors:  Shiheng Yang;  Jun Yin;  Haidong Yi;  Wei-Han Yu;  Pui-In Mak;  Rui P. Martins
Favorite | View/Download:44/0 | TC[WOS]:0 TC[Scopus]:5 | Submit date:2019/03/12
Bluetooth Low Energy (Ble)  Cmos  Energy Harvesting  Master-slave Sampling Filter (Mssf)  Micropower Manager (Μpm)  Phase-locked Loop (Pll)  Power Amplifier (Pa)  Power Gating  Transmitter (Tx)  Ultralow-voltage (Ulv)  Voltage-controlled Oscillator (Vco)  
Analysis of Reference Error in High-Speed SAR ADCs With Capacitive DAC Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019,Volume: 66,Issue: 1,Page: 82-93
Authors:  Li, Cheng;  Chan, Chi-Hang;  Zhu, Yan;  Martins, Rui P.
Favorite | View/Download:21/0 | TC[WOS]:1 TC[Scopus]:3 | Submit date:2019/01/17
Reference error  reference buffer  successive-approximation-register (SAR)  analog-to-digital converter (ADC)  reference ripple  
Algorithmic Voltage-Feed-In Topology for Fully Integrated Fine-Grained Rational Buck-Boost Switched-Capacitor DC-DC Converters Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018,Volume: 53,Issue: 12,Page: 3455-3469
Authors:  Jiang, Yang;  Law, Man-Kay;  Mak, Pui-In;  Martins, Rui P.
Favorite | View/Download:17/0 | TC[WOS]:1 TC[Scopus]:3 | Submit date:2019/01/17
Algorithmic voltage-feed-in (AVFI) topology  buck-boost  dc-dc  linear topology  parasitic loss  power density  rational voltage conversion ratio  reconfigurable  reference-selective bootstrapping  switched capacitor