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| Many-objective sizing optimization of a class-C/D VCO for ultralow-power iot and ultralow-phase-noise cellular applications Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019,Volume: 27,Issue: 1,Page: 69-82
Authors: Martins R.; Lourenco N.; Horta N.; Yin J.; Mak P.-I. ; Martins R.P.
  Favorite | View/Download：6/0 | Submit date：2019/02/11
Dual-mode Voltage-controlled Oscillator (Voc) Electronic Design Automation (Eda) Many-objective Optimization Multitest Bench Sizing Optimization Radio Frequency (Rf) Integrated Circuits (Ics) |
| A 10-MHz Bandwidth Two-Path Third-Order Σ Δ Modulator with Cross-Coupling Branches Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2018,Volume: 65,Issue: 10,Page: 1410-1414
Authors: Feng D.; Bonizzoni E.; Maloberti F.; Sin S.-W.; Martins R.
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cross-coupling noise transfer function polyphase decomposition two-path ΣΔ modulator |
| Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications Conference paper
SMACD 2018 - 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
Authors: Martins R.; Lourenco N.; Horta N.; Yin J.; Mak P.-I.; Martins R.P.
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| A 0.4V 4.8μW 16MHz CMOS crystal oscillator achieving 74-fold startup-time reduction using momentary detuning Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Baltimore, MD, MAY 28-31, 2017
Authors: Ka-Meng Lei; Pui-In Mak; R. P. Martins
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Cmos Crystal Oscillator Fast Startup Low-power Low-voltage Ultra-low-power |
| Metastablility in SAR ADCs Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2017,Volume: 64,Issue: 2,Page: 111-115
Authors: Chi-Hang Chan; Yan Zhu; Sai-Weng Sin; Boris Murmann; Seng-Pan U; R. P. Martins
Favorite | View/Download：14/0 | Submit date：2018/10/30
Analog-to-digital Converter (Adc) Comparator Metastability Successive Approximation Register (Sar) |
| A 0.4V 4.8 mu W 16MHz CMOS Crystal Oscillator Achieving 74-Fold Startup-Time Reduction Using Momentary Detuning Conference paper
Authors: Lei, Ka-Meng; Mak, Pui-In; Martins, R. P.; IEEE
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CMOS crystal oscillator fast startup low-voltage low-power ultra-low-power |
| A Calibration Scheme for Stability of Self-biased Ring Amplifier Conference paper
Authors: Yan, Rongshen; Chan, Chi-Hang; Sin, Sai-Weng; Seng-Pan, U.; Martins, R. P.; Wang, ZH; Xie, WH
Favorite | View/Download：0/0 | Submit date：2018/10/30
Calibration Self-biased Ring Amplifier PVT Variations Oscillation Detection Programmable Resistor |
| Circuit Techniques for IoT-Enabling Short-Range ULP Radios Book chapter
出自: Enabling the Internet of Things-from Integrated Circuits to Integrated Systems:Springer International Publishing, 2017, 页码:
385-408
Authors: Pui-In Mak; Zhicheng Lin; R. P. Martins
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Phase Noise Power Budget External Component Hybrid Filter Gain Stage |
| A 12b 180MS/s 0.068mm2 pipelined-SAR ADC with merged-residue DAC for noise reduction Conference paper
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, 12-15 Sept. 2016
Authors: Jianyu Zhong; Yan Zhu; Chi-Hang Chan; Sai-Weng Sin; Seng-Pan U; R. P. Martins
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| A high resolution multi-bit incremental converter insensitive to DAC mismatch error Conference paper
2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Lisbon, Portugal, JUN 27-30, 2016
Authors: Biao Wang; Sai-Weng Sin; Seng-Pan U; R. P. Martins
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High Resolution Incremental Converter Multi-bit Quantizer Insensitive To Dac Mismatch |
