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A 2.3 mW 10-bit 170 MS/s two-step binary-search assisted time-interleaved SAR ADC Journal article
IEEE Journal of Solid-State Circuits, 2013,Volume: 48,Issue: 8,Page: 1783-1794
Authors:  Si-Seng Wong;  U-Fat Chio;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
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Analog-to-digital Converter (Adc)  Binary-search Adc  Sar Adc  Time-interleaved  Two-step Adc  
A 2.3mW 10-bit 170MS/s two-step binary-search assisted time-interleaved SAR ADC Conference paper
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, San Jose, CA, USA, 9-12 Sept. 2012
Authors:  Si-Seng Wong;  U-Fat Chio;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
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Analog-to-digital Converter (Adc)  Binary-search Adc  Time-interleaved  Sar Adc  Two-step Adc  
A time-efficient dither-injection scheme for pipelined SAR ADC Conference paper
Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, Macau, China, 6-7 Oct. 2011
Authors:  Wang R.;  Chio U.-F.;  Chan C.-H.;  Ding L.;  Sin S.-W.;  Seng-Pan U.;  Wang Z.;  Martins R.P.
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Digital Calibration  Dither Injection  Pipelined  Sar Adc  
An ultra low power 9-bit 1-MS/s pipelined SAR ADC for bio-medical applications Conference paper
2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings, Athens, Greece, 12-15 Dec. 2010
Authors:  Yin G.;  Chio U.-F.;  Wei H.-G.;  Sin S.-W.;  U S.-P.;  Martins R.P.;  Wang Z.
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Bio-medical Applications  Pipelined  Sar Adc  Ultra-low Power  
Design and experimental verification of a power effective Flash-SAR subranging ADC Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2010,Volume: 57,Issue: 8,Page: 607-611
Authors:  U-Fat Chio;  He-Gong Wei;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins;  Franco Maloberti
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Analog-to-digital Converter (Adc)  Digital Error Correction (Dec)  Flash Adc  Sar Adc  Subranging Adc