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Gain Error Calibrations for Two-Step ADCs: Optimizations Either in Accuracy or Chip Area Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018,Volume: 26,Issue: 11,Page: 2279-2289
Authors:  Wang, Guan Cheng;  Zhu, Yan;  Chan, Chi-Hang;  Seng-Pan, U.;  Martins, Rui P.
Favorite  |  View/Download:3/0  |  Submit date:2019/01/17
Bridge digital-to-analog converter (DAC)  gain error calibration  successive approximation register (SAR)  analog-to-digital converters (ADCs)  testing signal generation (TSG)  
Analysis of common-mode interference and jitter of clock receiver circuits with improved topology Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 6,Page: 1819-1829
Authors:  Yang X.;  Zhu Y.;  Chan C.-H.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:8/0  |  Submit date:2019/02/11
Isf  Low Clock Jitter Circuit  Self-bias  
A Single-Stage Current-Mode Active Rectifier with Accurate Output-Current Regulation for IoT Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Florence, ITALY, MAY 27-30, 2018
Authors:  Mao F.;  Lu Y.;  Lin J.;  Zhan C.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:5/0  |  Submit date:2019/02/11
Ac-dc Converter  Current Sensing  Current-mode Active Rectifier  Wireless Charging  Wireless Power Transfer (Wpt)  
Quick and cost-efficient A/D converter static characterization using low-precision testing signal Journal article
MICROELECTRONICS JOURNAL, 2018,Volume: 74,Page: 86-93
Authors:  Qin, Wei Wei;  Sin, Sai-Weng;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:14/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Static Characterization Estimation  Adc Testing  Ramp Testing  Nonlinear Input Signal  Attenuated Input Signal  
A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018,Volume: 53,Issue: 3,Page: 850-860
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Zhang, Wai-Hong;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:23/0  |  Submit date:2018/10/30
1-then-2 B/cycle Sar Adc  Analog-to-digital Conversion  Background Offset Calibration  Multi-bit/cycle Sar Adc  Time Interleaving  
A 16-mW 1-GS/s With 49.6-dB SNDR TI-SAR ADC for Software-Defined Radio in 65-nm CMOS Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018,Volume: 26,Issue: 3,Page: 572-583
Authors:  Qiu, Lei;  Tang, Kai;  Zheng, Yuanjin;  Siek, Liter;  Zhu, Yan;  U, Seng-Pan
Favorite  |  View/Download:13/0  |  Submit date:2018/10/30
Digital Background Calibration  Subradix-2  Successive Pproximation Register (Sar) Analog-to-digital Converters (Adcs)  Time Interleaved (Ti)  Time Skew  
Passive Noise Shaping in SAR ADC With Improved Efficiency Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018,Volume: 26,Issue: 2,Page: 416-420
Authors:  Song, Yan;  Chan, Chi-Hang;  Zhu, Yan;  Geng, Li;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:21/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Delta Sampling  Oversampling  Passive Noise Shaping (Pns)  Successive Approximation Register (Sar)  
A Dual-Output SC Converter with Dynamic Power Allocation for Multi-Core Application Processors Conference paper
Authors:  Jiang, Junmin;  Lu, Yan;  Liu, Xun;  Ki, Wing-Hung;  Mok, Philip K. T.;  Seng-Pan, U.;  Martins, Rui P.;  IEEE
Favorite  |  View/Download:2/0  |  Submit date:2018/10/30
An Analog-Assisted Tri-Loop Digital Low-Dropout Regulator Conference paper
Authors:  Huang, Mo;  Lu, Yan;  Seng-Pan, U.;  Martins, Rui P.
Favorite  |  View/Download:0/0  |  Submit date:2018/10/30
Amplifier  analog assisted (AA)  coarse/fine tuning  digital control  fully integrated voltage regulator (FIVR)  limit cycle oscillation (LCO)  low-dropout (LDO) regulator  nonlinear control  output-capacitor-free  power management  
A reconfigurable cross-connected wireless-power transceiver for bidirectional device-to-device charging with 78.1% total efficiency Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference, San Francisco, CA, United states, FEB 11-15, 2018
Authors:  Fangyu Mao;  Yan Lu;  Seng-Pan U;  Rui P. Martins
Favorite  |  View/Download:7/0  |  Submit date:2018/11/06