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Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC with Optimal Code Transfer Technique Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 2,Page: 489-501
Authors:  Xing D.;  Zhu Y.;  Chan C.-H.;  Maloberti F.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:4/0  |  Submit date:2019/02/11
reference interference  SAR ADC  time-interleaved scheme  two-step SAR conversion  
Accuracy-enhanced variance-based time-skew calibration using SAR as window detector Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019,Volume: 27,Issue: 2,Page: 481-485
Authors:  Liu J.;  Chan C.-H.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:10/0  |  Submit date:2019/02/13
Bandwidth mismatches  split-digital to analog converter (DAC)  successive-approximation-register (SAR) analog-to-digital converter (ADC)  time-interleaved (TI)  variance based  window detector (WD)  
A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler Conference paper
2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings
Authors:  Jiang W.;  Zhu Y.;  Chan C.-H.;  Murmann B.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:2/0  |  Submit date:2019/02/11
background calibration  current integrating sampler  Time-interleaved ADC  timing skew  
A 550μW 20kHz BW 100.8DB SNDR Linear-Exponential Multi-Bit Incremental Converter with 256-cycles in 65NM CMOS Conference paper
IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Authors:  Wang B.;  Sin S.-W.;  Seng-Pan U.;  Malobertr F.;  Martins R.P.
Favorite  |  View/Download:3/0  |  Submit date:2019/02/11
A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems Conference paper
2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018
Authors:  Mao F.;  Lu Y.;  Seng-Pan U.;  Martins R.P.
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delay compensation  feedback loop  implantable medical devices  real time  voltage doubler  wireless power transfer  
A dual-output SC converter with dynamic power allocation for multicore application processors Conference paper
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Authors:  Jiang J.;  Lu Y.;  Liu X.;  Ki W.-H.;  Mok P.K.T.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:1/0  |  Submit date:2019/02/11
Linear-phase halfband SC video interpolation filter with coefficient-sharing and spread-reduction Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems
Authors:  U Seng-Pan;  Martins R.P.;  Franca J.E.
Favorite  |  View/Download:1/0  |  Submit date:2019/02/11