UM

Browse/Search Results:  1-7 of 7 Help

Filters    
Selected(0)Clear Items/Page:    Sort:
Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC with Optimal Code Transfer Technique Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 2,Page: 489-501
Authors:  Xing D.;  Zhu Y.;  Chan C.-H.;  Maloberti F.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:4/0  |  Submit date:2019/02/11
reference interference  SAR ADC  time-interleaved scheme  two-step SAR conversion  
Analysis of common-mode interference and jitter of clock receiver circuits with improved topology Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 6,Page: 1819-1829
Authors:  Yang X.;  Zhu Y.;  Chan C.-H.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:8/0  |  Submit date:2019/02/11
Isf  Low Clock Jitter Circuit  Self-bias  
A 12b 180MS/s 0.068mm2 with Full-Calibration-Integrated Pipelined-SAR ADC Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2017,Volume: 64,Issue: 7,Page: 1684-1695
Authors:  Jianyu Zhong;  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:10/0  |  Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Low Power  Successive Approximation Architecture  Switched-capacitor Circuits  
Thermal and Reference Noise Analysis of Time-Interleaving SAR and Partial-Interleaving Pipelined-SAR ADCs Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2015,Volume: 62,Issue: 9,Page: 2196-2206
Authors:  Jianyu Zhong;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:7/0  |  Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Reference Noise  Successive-approximation-register (Sar) Adc  Thermal Noise  
Generalized circuit techniques for low-voltage high-speed reset- and switched-opamps Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2008,Volume: 55,Issue: 8,Page: 2188-2201
Authors:  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
Common-mode Feedback (Cmfb)  Finite-gain Compensation (Fgc)  Low Voltage (Lv)  Reset-opamp (Ro)  Switched-capacitor (Sc) Circuits  Switched-opamp (So)  
On the design of a programmable-gain amplifier with built-In compact DC-Offset cancellers for very low-voltage WLAN systems Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2008,Volume: 55,Issue: 2,Page: 496-509
Authors:  Pui-In Mak;  Seng-Pan U;  Rui P. Martins
Favorite  |  View/Download:7/0  |  Submit date:2018/10/30
Cmos  Constant Bandwidth (Bw)  Dc-offset Canceller (Doc)  Low Voltage (Lv)  Programmable-gain Amplifier (Pga)  Transient  Wireless Local-area Network (Wlan)  
Two-step channel selection - A novel technique for reconfigurable multistandard transceiver front-ends Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2005,Volume: 52,Issue: 7,Page: 1302-1315
Authors:  Mak, Pui-In;  U, Seng-Pan;  Martins, Rui P.
Favorite  |  View/Download:10/0  |  Submit date:2018/11/06