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A 220-MHz Bondwire-Based Fully-Integrated KY Converter With Fast Transient Response Under DCM Operation Conference paper
Authors:  Zeng, Wen-Liang;  Lam, Chi-Seng;  Sin, Sai-Weng;  Maloberti, Franco;  Wong, Man-Chung;  Martins, Rui Paulo
Favorite  |  View/Download:14/0  |  Submit date:2018/10/30
Fully integrated KY converter  boost converter  PWM  discontinuous conduction mode (DCM)  zero current detection (ZCD)  load transient response  voltage ripple  bondwire inductor  
Process compensated bipolar junction transistor-based CMOS temperature sensor with a +/- 1.5 degrees C (3 sigma) batch-to-batch inaccuracy Journal article
ELECTRONICS LETTERS, 2018,Volume: 54,Issue: 22,Page: 1270-1271
Authors:  Sun, Dapeng;  Zhang, Tan-Tan;  Law, Man-Kay;  Mak, Pui-In;  Martins, Rui Paulo
Favorite  |  View/Download:2/0  |  Submit date:2019/01/17
resistors  calibration  CMOS integrated circuits  bipolar transistors  temperature sensors  first-batch-only calibration parameters  batch-to-batch inaccuracy  piecewise BJT process  compensation property  base recombination current  base-emitter voltage  CMOS temperature sensor  process compensated BJT  intra-die variation  spread compensation property  on-chip resistors  inter-die variation  current 3  0 muA  voltage 1  2 V  temperature-40 degC to 125 degC  size 0  036 mm  
A 14-Bit Split-Pipeline ADC With Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current Conference paper
Authors:  Mao, Jiaji;  Guo, Mingqiang;  Sin, Sai-Weng;  Martins, Rui Paulo
Favorite  |  View/Download:12/0  |  Submit date:2018/10/30
Analog-to-digital conversion  digital background calibration  pipelined ADC  split ADC  opamp-sharing technique  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Delta Sigma Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Conference paper
Authors:  Wang, Wei;  Zhu, Yan;  Chan, Chi-Hang;  Martins, Rui Paulo
Favorite  |  View/Download:14/0  |  Submit date:2018/10/30
Terms-Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 10-MHz Bandwidth Two-Path Third-Order Sigma Delta Modulator With Cross-Coupling Branches Conference paper
Authors:  Feng, Da;  Bonizzoni, Edoardo;  Maloberti, Franco;  Sin, Sai-Weng;  Martins, Rui Paulo
Favorite  |  View/Download:15/0  |  Submit date:2018/10/30
Sigma Delta modulator  two-path  cross-coupling  noise transfer function  polyphase decomposition  
A Reconfigurable and Extendable Digital Architecture for Mixed Signal Power Electronics Controller Conference paper
Authors:  Wu, Ya-Jie;  Lam, Chi-Seng;  Wong, Man-Chung;  Sin, Sai-Weng;  Martins, Rui Paulo
Favorite  |  View/Download:9/0  |  Submit date:2018/10/30
Building block  digital controller  reconfigurable and extendable digital architecture  mixed signal PE controller  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 10,Page: 2783-2794
Authors:  Wang,Wei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui Paulo
Favorite  |  View/Download:3/0  |  Submit date:2019/08/22
Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
Quick and cost-efficient A/D converter static characterization using low-precision testing signal Journal article
MICROELECTRONICS JOURNAL, 2018,Volume: 74,Page: 86-93
Authors:  Qin, Wei Wei;  Sin, Sai-Weng;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:12/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Static Characterization Estimation  Adc Testing  Ramp Testing  Nonlinear Input Signal  Attenuated Input Signal  
A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018,Volume: 53,Issue: 3,Page: 850-860
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Zhang, Wai-Hong;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:17/0  |  Submit date:2018/10/30
1-then-2 B/cycle Sar Adc  Analog-to-digital Conversion  Background Offset Calibration  Multi-bit/cycle Sar Adc  Time Interleaving  
Passive Noise Shaping in SAR ADC With Improved Efficiency Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018,Volume: 26,Issue: 2,Page: 416-420
Authors:  Song, Yan;  Chan, Chi-Hang;  Zhu, Yan;  Geng, Li;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:17/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Delta Sampling  Oversampling  Passive Noise Shaping (Pns)  Successive Approximation Register (Sar)