UM
(Note: the search results are based on claimed items)

Browse/Search Results:  1-2 of 2 Help

Filters        
Selected(0)Clear Items/Page:    Sort:
A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 20-24 Feb. 2011
Authors:  Wei H.;  Chan C.-H.;  Chio U.-F.;  Sin S.-W.;  Seng-Pan U.;  Martins R.;  Maloberti F.
Favorite | View/Download:20/0 | TC[WOS]:0 TC[Scopus]:62 | Submit date:2019/02/11
An 11b 60MS/s 2.1mW two-step time-interleaved SAR-ADC with reused S&H Conference paper
2010 Proceedings of ESSCIRC, Seville, Spain, 14-16 Sept. 2010
Authors:  Sin S.-W.;  Ding L.;  Zhu Y.;  Wei H.-G.;  Chan C.-H.;  Chio U.-F.;  Seng-Pan U.;  Martins R.P.;  Maloberti F.
Favorite | View/Download:17/0 | TC[WOS]:0 TC[Scopus]:11 | Submit date:2019/02/11