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Jitter-resistant Capacitor Based Sine-Shaped DAC for Continuous-Time Sigma-Delta modulators Conference paper
2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, AUSTRALIA, JUN 01-05, 2014
Authors:  Da Feng;  Franco Maloberti;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite | View/Download:8/0 | TC[WOS]:1 TC[Scopus]:0 | Submit date:2019/02/11
An ELD tracking compensation technique for active-RC CT ΣΔ modulators Conference paper
2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS), Boise, ID, USA, AUG 05-08, 2012
Authors:  Chen-Yan Cai;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U;  Rui. P. Martins
Favorite | View/Download:12/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/11
Inter-Stage Gain Error self-calibration of a 31.5fJ 10b 470MS/S pipelined-SAR ADC Conference paper
2012 IEEE Asian Solid State Circuits Conference (A-SSCC), Kobe, JAPAN, NOV 12-14, 2012
Authors:  Jianyu Zhong;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite | View/Download:15/0 | TC[WOS]:5 TC[Scopus]:0 | Submit date:2019/02/11
Microstrip Two-Section Dual-Band Impedance Transformer Design with Spurious Matching Suppression Conference paper
Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2005, Hong Kong, China, July 2005.
Authors:  Sio-Weng Ting;  Kam-Weng-Tam;  Rui P. Martins
Favorite | View/Download:7/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/03/29
Dual-band  Impedance Transformer  Transmission Zero Placement  Spurline  Spurious Matching