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A 2.3 mW 10-bit 170 MS/s two-step binary-search assisted time-interleaved SAR ADC Journal article
IEEE Journal of Solid-State Circuits, 2013,Volume: 48,Issue: 8,Page: 1783-1794
Authors:  Si-Seng Wong;  U-Fat Chio;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:15/0  |  Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Binary-search Adc  Sar Adc  Time-interleaved  Two-step Adc  
Cascade Analog to Digital Converting System Patent
专利类型: 发明专利, 专利号: US8466823B2, 申请日期: 2011-08-05, 公开日期: 2013-06-18
Authors:  U-Fat CHIO;  He-Gong Wei;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo da Silva Martins;  Franco Maloberti
Favorite  |  View/Download:14/0  |  Submit date:2019/03/06
N-bits successive approximation register analog-to-digital converting circuit Patent
专利类型: 发明专利, 专利号: US20120306679A1, 申请日期: 2011-06-01,
Authors:  Yan ZHU;  Chi-Hang CHAN;  U-Fat CHIO;  Sai-Weng SIN;  Seng-Pan U;  Rui Paulo Da Silva MARTINS;  Franco MALOBERTI
Favorite  |  View/Download:11/0  |  Submit date:2019/02/26
A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS Conference paper
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, PEOPLES R CHINA, MAY 19-23, 2013
Authors:  Wen-Lan Wu;  Yan Zhu;  Li Ding;  Chi-Hang Chan;  U-Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:12/0  |  Submit date:2019/02/11
A 5-bit 1.25-GS/s 4x-capacitive-folding flash ADC in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2013,Volume: 48,Issue: 9,Page: 2154-2169
Authors:  Chi-Hang Chan;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite  |  View/Download:10/0  |  Submit date:2018/10/30
Analog-to-digital Conversion (Adc)  Calibration  Embedded Reference  Flash Adc  Folding  Low Power