UM
(本次检索基于用户作品认领结果)

浏览/检索结果: 共1条,第1-1条 帮助

限定条件            
已选(0)清除 条数/页:   排序方式:
Sub-threshold VLSI logic family exploiting unbalanced pull-up/down network, logical effort and inverse-narrow-width techniques Conference paper
2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), Macau, China, JAN 25-28, 2016
作者:  Ming-Zhong Li;  Chio-In Ieong;  Man-Kay Law;  Pui-In Mak;  Mang-I Vai;  Sio-Hang Pun;  Rui P. Martins
收藏  |  浏览/下载:17/0  |  提交时间:2019/02/11