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Digital 2-/3-Phase Switched-Capacitor Converter With Ripple Reduction and Efficiency Improvement Conference paper
Authors:  Jiang, Junmin;  Ki, Wing-Hung;  Lu, Yan
Favorite  |  View/Download:7/0  |  Submit date:2018/10/30
Adaptive ripple reduction  dc-dc converter  digitally controlled  efficiency improvements  2-/3-phase  3-phase  SC converter  switched-capacitor (SC)  voltage conversion ratio  voltage regulator  
A digitally-controlled 2-/3-phase 6-ratio switched- capacitor DC-DC converter with adaptive ripple reduction and efficiency improvements Conference paper
European Solid-State Circuits Conference, Lausanne, SWITZERLAND, SEP 12-15, 2016
Authors:  Jiang J.;  Lu Y.;  Ki W.-H.
Favorite  |  View/Download:5/0  |  Submit date:2019/02/14
A 0.038mm2 SAW-less multiband transceiver using an N-Path SC gain loop Conference paper
2016 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 1 31, 2016 - 2 4, 2016
Authors:  Gengzhen Qi;  Pui-In Mak;  Rui P. Martins
Favorite  |  View/Download:21/0  |  Submit date:2018/11/06
A 2-/3-phase fully integrated switched-capacitor DC-DC converter in bulk CMOS for energy-efficient digital circuits with 14% efficiency improvement Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference, San Francisco, CA, United states, 2 22, 2015 - 2 26, 2015
Authors:  Jiang, Junmin;  Lu, Yan;  Huang, Cheng;  Ki, Wing-Hung;  Mok, Philip K. T.
Favorite  |  View/Download:4/0  |  Submit date:2018/11/06
A 26.3 dBm 2.5 to 6 GHz wideband class-D switched-capacitor power amplifier with 40% peak PAE Conference paper
2014 IEEE International Conference on Electron Devices and Solid-State Circuits, Chengdu, PEOPLES R CHINA, JUN 18-20, 2014
Authors:  Xing-Qiang Peng;  Wei-Han Yu;  Pui-In Mak;  Rui P. Martins
Favorite  |  View/Download:10/0  |  Submit date:2019/02/11
NTF zero compensation technique for passive sigma-delta modulator Conference paper
Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, Macau, China, 6-7 Oct. 2011
Authors:  Hussain A.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:9/0  |  Submit date:2019/02/11
A fixed-pulse shape feedback technique with reduced clock-jitter sensitivity in continuous-time sigma-delta modulators Conference paper
2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings, Athens, Greece, 12-15 Dec. 2010
Authors:  Jiang Y.;  Wong K.-F.;  Cai C.-Y.;  Sin S.-W.;  U S.-P.;  Martins R.P.
Favorite  |  View/Download:5/0  |  Submit date:2019/02/11
Clock-jitter  Continuous-time Sigma-delta Modulator  Fixed-pulse Shape Feedback  Rc Discharge  Zero-crossing Detector  
A reduced jitter-sensitivity clock generation technique for continuous-time ΣΔ modulators Conference paper
IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, Kuala Lumpur, MALAYSIA, DEC 06-09, 2010
Authors:  Jiang Y.;  Wong K.-F.;  Cai C.-Y.;  Sin S.-W.;  U S.-P.;  Martins R.P.
Favorite  |  View/Download:9/0  |  Submit date:2019/02/11
Clock-jitter Sensitivity  Continuous-time  Sigma-delta Modulator  Switched Current Dac  
Level-shifting variable current charging technique for high-speed Comparator-Based Switched-Capacitor circuits Conference paper
Midwest Symposium on Circuits and Systems, Seattle, WA, AUG 01-04, 2010
Authors:  Wong K.-F.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
A pseudo-differential comparator-based pipelined ADC with common mode feedforward technique Conference paper
IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, Macao, PEOPLES R CHINA, NOV 30-DEC 03, 2008
Authors:  Ding L.;  Chan S.;  Wong K.-F.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:7/0  |  Submit date:2019/02/11