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A 12-bit 110MS/s 4-stage single-opamp pipelined SAR ADC with ratio-based GEC technique Conference paper
2012 Proceedings of the ESSCIRC (ESSCIRC), Bordeaux, France, 17-21 Sept. 2012
Authors:  Rui Wang;  U-Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Zhihua Wang;  Rui Paulo Martins
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
Sar Adc  Pipelined  Digital Calibration  Op-amp Sharing  
A 50-fJ 10-b 160-MS/s pipelined-SAR ADC decoupled flip-around MDAC and self-embedded offset cancellation Journal article
IEEE Journal of Solid-State Circuits, 2012,Volume: 47,Issue: 11,Page: 2614-2626
Authors:  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite  |  View/Download:12/0  |  Submit date:2018/10/30
Decoupled Flip-around Mdac  Offset-cancellation  Pipelined-sar Adc  Vdd -attenuator  
Inter-Stage Gain Error self-calibration of a 31.5fJ 10b 470MS/S pipelined-SAR ADC Conference paper
2012 IEEE Asian Solid State Circuits Conference (A-SSCC), Kobe, JAPAN, NOV 12-14, 2012
Authors:  Jianyu Zhong;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite  |  View/Download:11/0  |  Submit date:2019/02/11