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A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 10,Page: 2783-2794
Authors:  Wang W.;  Zhu Y.;  Chan C.-H.;  Martins R.P.
Favorite  |  View/Download:4/0  |  Submit date:2019/02/11
Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 10-MHz Bandwidth Two-Path Third-Order Σ Δ Modulator with Cross-Coupling Branches Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2018,Volume: 65,Issue: 10,Page: 1410-1414
Authors:  Feng D.;  Bonizzoni E.;  Maloberti F.;  Sin S.-W.;  Martins R.
Favorite  |  View/Download:3/0  |  Submit date:2019/02/11
cross-coupling  noise transfer function  polyphase decomposition  two-path  ΣΔ modulator  
A 5.35-mW 10-MHz Single-Opamp Third-Order CT Δ\Σ Modulator with CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 10,Page: 2783-2794
Authors:  Wang,Wei;  Zhu,Yan;  Chan,Chi Hang;  Martins,Rui Paulo
Favorite  |  View/Download:3/0  |  Submit date:2019/08/22
Analog-to-digital conversion (ADC)  continuous-time (CT) delta-sigma modulator  DAC driver  passive integrator  single amplifier biquad (SAB)  
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Delta Sigma Modulator With Multirate Opamp Sharing Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 10,Page: 2641-2654
Authors:  Liang Qi;  Sai-Weng Sin;  Seng-Pan, U.;  Franco Maloberti;  Rui Paulo Martins
Favorite  |  View/Download:14/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Discrete-time (Dt) Delta Sigma (Delta Sigma) Modulator  Multi-stage Noise Shaping (Mash)  Wideband  Power-efficient  Opamp Sharing  Multirate  Successive Approximation Register (Sar) Quantizer  
Reconfigurable mismatch-free time-interleaved bandpass sigma-delta modulator for wireless communications Journal article
ELECTRONICS LETTERS, 2017,Volume: 53,Issue: 7,Page: 506–508
Authors:  Dongyang Jiang;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite  |  View/Download:14/0  |  Submit date:2018/10/30
Sigma-delta Modulation  Modulators  Software Radio  Radio Receivers  Circuit Simulation  Band-pass Filters  Table Lookup  Reconfigurable Mismatch-free Time-interleaved Bandpass Sigma-delta Modulator  Wireless Communications  Control Parameters  Look-up Table  Path Numbers  Path Sampling Frequencies  Tuning Coefficients  Design Reconfigurability  Multiband Receiver  Software Defined Radio Systems  Behavioural Simulations  
Active-Passive Delta Sigma Modulator for High-Resolution and Low-Power Applications Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017,Volume: 25,Issue: 1,Page: 364-374
Authors:  Hussain, Arshad;  Sin, Sai-Weng;  Chan, Chi-Hang;  U, Seng-Pan (Ben);  Maloberti, Franco;  Martins, Rui P.
Favorite  |  View/Download:15/0  |  Submit date:2018/10/30
Delta-Sigma Modulator (Delta Sigma m)  Discrete Time (Dt)  Low-gain-amplifier-based Switched-capacitor (Sc) Integrator  Noise Shaping  Passive Sc Integrator  
A CMOS Delta-Sigma PLL Transmitter with Efficient Modulation Bandwidth Calibration Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2015,Volume: 62,Issue: 7,Page: 1716-1725
Authors:  Huang M.;  Chen D.;  Guo J.;  Ye H.;  Xu K.;  Liang X.;  Lu Y.
Favorite  |  View/Download:5/0  |  Submit date:2019/02/14
Delta-sigma Phase Locked Loop (Pll)  Modulation Bandwidth Calibration  Transmitters  
Resolution-enhanced sturdy MASH delta-sigma modulator for wideband low-voltage applications Journal article
Electronics Letters, 2015,Volume: 51,Issue: 14,Page: 1061-1063
Authors:  Liang Qi;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:4/0  |  Submit date:2019/02/11
Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters Journal article
Analog Integrated Circuits and Signal Processing, 2013,Volume: 76,Issue: 1,Page: 35-46
Authors:  Chen-Yan Cai;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
Ct Δς Modulator  Excess-loop-delay Compensation Techniques For Hybrid Active-passive Loop-filter  Excess-loop-delay For Hybrid Active-passive Loop-filter  Hybrid Active-passive Loop-filter