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A 12b 180MS/s 0.068mm2 pipelined-SAR ADC with merged-residue DAC for noise reduction Conference paper
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, 12-15 Sept. 2016
Authors:  Jianyu Zhong;  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
Favorite  |  View/Download:14/0  |  Submit date:2019/02/11
An RF-to-BB-Current-Reuse Wideband Receiver with Parallel N-Path Active/Passive Mixers and a Single-MOS Pole-Zero LPF Conference paper
2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), San Francisco, CA, USA, 9-13 Feb. 2014
Authors:  Fujian Lin;  Pui-In Mak;  Rui Martins
Favorite  |  View/Download:7/0  |  Submit date:2019/03/27
An RF-to-BB current-reuse wideband receiver with parallel N-path active/passive mixers and a single-MOS pole-zero LPF Conference paper
Digest of Technical Papers - IEEE International Solid-State Circuits Conference, San Francisco, CA, United states, 2 9, 2014 - 2 13, 2014
Authors:  Lin, Fujian;  Mak, Pui-In;  Martins, Rui
Favorite  |  View/Download:7/0  |  Submit date:2018/11/06
A search for the dominant free surface-fluctuation frequency downstream of the oscillating hydraulic jump with the Bayesian spectral density approach Conference paper
Physica Scripta, Trieste, ITALY, AUG 21-28, 2011
Authors:  K M Mok;  K V Yuen;  K H Cheong;  K I Hoi
Favorite  |  View/Download:2/0  |  Submit date:2019/05/28
A 10.4-ENOB 120MS/s SAR ADC with DAC linearity calibration in 90nm CMOS Conference paper
2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), Singapore, SINGAPORE, NOV 11-13, 2013
Authors:  Yan Zhu;  Chi-Hang Chan;  Seng-Pan U;  R.P.Martins
Favorite  |  View/Download:7/0  |  Submit date:2019/02/11
A 1.5GS/s 6bit 2bit/Step asynchronous time interleaved SAR ADC in 65nm CMOS Conference paper
ECS Transactions
Authors:  Wang Z.;  Chen Y.;  Qian H.
Favorite  |  View/Download:2/0  |  Submit date:2019/02/14
A 22.4 μw 80dB SNDR ΣΔ modulator with passive analog adder and SAR quantizer for EMG application Conference paper
2012 IEEE Asian Solid State Circuits Conference (A-SSCC), Kobe, JAPAN, NOV 12-14, 2012
Authors:  Zhijie Chen;  Yang Jiang;  Chenyan Cai;  He-Gong Wei;  Sai-Weng Sin;  Seng-Pan U;  Zhihua Wang;  Rui Paulo Martins
Favorite  |  View/Download:9/0  |  Submit date:2019/02/11
Σδ Modulator  Sar Quantizer  Passive Analog Adder  
A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC Conference paper
2012 Symposium on VLSI Circuits Digest of Technical Papers, Honolulu, HI, USA, 13-15 June 2012
Authors:  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
Favorite  |  View/Download:15/0  |  Submit date:2019/02/11
A 2.3mW 10-bit 170MS/s two-step binary-search assisted time-interleaved SAR ADC Conference paper
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, San Jose, CA, USA, 9-12 Sept. 2012
Authors:  Si-Seng Wong;  U-Fat Chio;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
Favorite  |  View/Download:9/0  |  Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Binary-search Adc  Time-interleaved  Sar Adc  Two-step Adc  
A 35 fJ 10b 160 MS/s pipelined-SAR ADC with decoupled flip-around MDAC and self-embedded offset cancellation Conference paper
2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011, Jeju, SOUTH KOREA, NOV 14-16, 2011
Authors:  Zhu Y.;  Chan C.-H.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.;  Maloberti F.
Favorite  |  View/Download:12/0  |  Submit date:2019/02/11