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A 12b 180MS/s 0.068mm2 with Full-Calibration-Integrated Pipelined-SAR ADC Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2017,Volume: 64,Issue: 7,Page: 1684-1695
Authors:  Jianyu Zhong;  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:13/0  |  Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Low Power  Successive Approximation Architecture  Switched-capacitor Circuits  
A high resolution multi-bit incremental converter insensitive to DAC mismatch error Conference paper
2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Lisbon, Portugal, JUN 27-30, 2016
Authors:  Biao Wang;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
Favorite  |  View/Download:6/0  |  Submit date:2019/02/11
High Resolution  Incremental Converter  Multi-bit Quantizer  Insensitive To Dac Mismatch  
Self-Reconfiguration Property of a Mixed Signal Controller for Improving Power Quality Compensation During Light Loading Journal article
IEEE Transactions on Power Electronics, 2015,Volume: 30,Issue: 10,Page: 5938-5951
Authors:  Man-Chung Wong;  Yan-Zheng Yang;  Chi-Seng Lam;  Wai-Hei Choi;  Ning Yi Dai;  Yajie Wu;  Chi-Kong Wong;  Sai-Weng Sin;  U-Fat Chio;  Seng-Pan U;  Rui P. Martins
Favorite  |  View/Download:13/0  |  Submit date:2018/12/23
Converters  Power Conditioning  Power Quality  Power System Harmonics  Reactive Power