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Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC with Optimal Code Transfer Technique Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2019,Volume: 66,Issue: 2,Page: 489-501
Authors:  Xing D.;  Zhu Y.;  Chan C.-H.;  Maloberti F.;  Seng-Pan U.;  Martins R.P.
Favorite  |  View/Download:5/0  |  Submit date:2019/02/11
reference interference  SAR ADC  time-interleaved scheme  two-step SAR conversion  
A coin-battery-powered LDO-Free 2.4-GHz Bluetooth Low Energy/ZigBee receiver consuming 2 mA Journal article
Integration, 2019
Authors:  Balan Z.;  Ramiah H.;  Rajendran J.;  Vitee N.;  Shasidharan P.N.;  Yin J.;  Mak P.-I.;  Martins R.P.
Favorite  |  View/Download:2/0  |  Submit date:2019/02/11
Bluetooth Low Energy (BLE)  CMOS receiver  Current-reuse  Forward body bias  I/Q mixers  Low power  Quadrature LNA  Voltage-controlled oscillator (VCO)  ZigBee  
An inverse-class-F CMOS oscillator with intrinsic-high-Q first harmonic and second harmonic resonances Journal article
IEEE Journal of Solid-State Circuits, 2018,Volume: 53,Issue: 12,Page: 3528-3539
Authors:  Lim C.C.;  Ramiah H.;  Yin J.;  Mak P.-I.;  Martins R.P.
Favorite  |  View/Download:3/0  |  Submit date:2019/02/11
Figure of merit (FoM)  flicker noise upconversion  inverse-class-F (class-F-1) oscillator  phase noise (PN)  second harmonic resonance  voltage-biased oscillator  
A 14-Bit Split-Pipeline ADC with Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2018,Volume: 65,Issue: 10,Page: 1380-1384
Authors:  Mao J.;  Guo M.;  Sin S.-W.;  Martins R.P.
Favorite  |  View/Download:4/0  |  Submit date:2019/02/11
Analog-to-digital conversion  digital background calibration  opamp-sharing technique  pipelined ADC  split ADC  
A 4.06 mW 10-bit 150 MS/s SAR ADC with 1.5-bit/cycle Operation for Medical Imaging Applications Journal article
IEEE Sensors Journal, 2018,Volume: 18,Issue: 11,Page: 4553-4560
Authors:  Sunny S.;  Chen Y.;  Boon C.C.
Favorite  |  View/Download:2/0  |  Submit date:2019/02/14
1.5-bit/cycle  ADC  capacitive digital-to-analog converter (CDAC)  CMOS  error correction  low power  medical imaging  redundancy  SAR  successive approximation register