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A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures
Journal article
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017,Volume: 25,Issue: 4,Page: 1307-1319
Authors:
Ieong, Chio-In
;
Li, Mingzhong
;
Law, Man-Kay
;
Mak, Pui-In
;
Vai, Mang I.
;
Martins, Rui P.
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TC[WOS]:
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TC[Scopus]:
15
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Submit date：2018/10/30
Adaptive Temporal Decimation (Atd)
Data Compression Processor
Electrocardiogram (Ecg)
Near-threshold Digital Logics
Wavelet Shrinkage (Ws)
Wavelet Transform (Wt)
