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A 12b 180MS/s 0.068mm2 pipelined-SAR ADC with merged-residue DAC for noise reduction Conference paper
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, 12-15 Sept. 2016
作者:  Jianyu Zhong;  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
收藏  |  浏览/下载:14/0  |  提交时间:2019/02/11
An NMOS-LDO Regulated Switched-Capacitor DC-DC Converter with Fast-Response Adaptive-Phase Digital Control Journal article
IEEE Transactions on Power Electronics, 2016,Volume: 31,Issue: 2,Page: 1294-1303
作者:  Lu Y.;  Ki W.-H.;  Patrick Yue C.
收藏  |  浏览/下载:11/0  |  提交时间:2019/02/14
Dc-dc Converter  Digital Controller  Low Dropout Regulator (Ldo)  Power Supply Rejection (Psr)  Switched Capacitor Power Converter (Scpc)  Voltage Regulator  
A 6 b 5 GS/s 4 Interleaved 3 b/Cycle SAR ADC Journal article
IEEE Journal of Solid-State Circuits, 2016,Volume: 51,Issue: 2,Page: 365-377
作者:  Chi-Hang Chan;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan (Ben) U;  Rui Paulo Martins
收藏  |  浏览/下载:10/0  |  提交时间:2019/02/11
Analog-to-digital Conversion  Interleaving  Interpolation  Multibit/cycle Sar  Offset Calibration