UM

Browse/Search Results:  1-3 of 3 Help

Filters    
Selected(0)Clear Items/Page:    Sort:
1.2-V, 10-bit, 60– 360 MS/s time-interleaved pipelined analog-to-digital converter in 0.18 mm CMOS with minimised supply headroom Journal article
IET Circuits, Devices & Systems, 2010,Volume: 4,Issue: 1,Page: 1-13
Authors:  S.-W. Sin;  Seng-Pan U;  R.P. Martins
Favorite  |  View/Download:2/0  |  Submit date:2019/02/27
A 1.2-V 10-bit 60–360MS/s Time-Interleaved Pipelined ADC in 0.18μm CMOS with Minimized Supply Headroom Journal article
IET Circuits, Devices & Systems, 2010,Volume: 4,Issue: 1,Page: 1-13
Authors:  S.-W. Sin;  Seng-Pan U;  R.P. Martins
Favorite  |  View/Download:1/0  |  Submit date:2019/03/14
Experimental 1-V flexible-IF CMOS analoguebaseband chain for IEEE 802.11a/b/g WLAN receivers Journal article
IET Circuits, Devices & Systems, 2007,Volume: 1,Issue: 6,Page: 415-426
Authors:  P.-I. Mak;  S.-P. U;  R.P. Martins
Favorite  |  View/Download:7/0  |  Submit date:2019/02/11