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A 0.4 v 6.4 μw 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over -30 to 100 °c for Wearable and Sensing Applications Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems
Authors:  Lei K.-M.;  Mak P.-I.;  Martins R.P.
Favorite  |  View/Download:7/0  |  Submit date:2019/02/11
bootstrap  bulk-driven amplifier  CMOS  relaxation oscillator (RxO)  ultra-low-voltage (ULV)  wearable devices  
A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration Journal article
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2018,Volume: 53,Issue: 3,Page: 850-860
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Zhang, Wai-Hong;  Seng-Pan, U.;  Martins, Rui Paulo
Favorite  |  View/Download:23/0  |  Submit date:2018/10/30
1-then-2 B/cycle Sar Adc  Analog-to-digital Conversion  Background Offset Calibration  Multi-bit/cycle Sar Adc  Time Interleaving  
Micro-NMR on CMOS for biomolecular sensing Book chapter
出自: CMOS Circuits for Biological Sensing and Processing Systems:Springer International Publishing, 2018, 页码: 101-132
Authors:  Ka-Meng Lei;  Nan Sun;  Pui-In Mak;  Rui Paulo Martins;  Donhee Ham
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Nuclear Magnetic Resonance (Nmr)  Radio-frequency (Rf) Integrated Circuits  Cmos  Biomolecular Sensing  Sample Management  B-field Calibration  
A 7.8-mW 5-b 5-GS/s Dual-Edges-Triggered Time-Based Flash ADC Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017,Volume: 64,Issue: 8,Page: 1966-1976
Authors:  Chan, Chi-Hang;  Zhu, Yan;  Sin, Sai-Weng;  Seng-Pan, U.;  Martins, Rui P.;  Maloberti, Franco
Favorite  |  View/Download:22/0  |  Submit date:2018/10/30
Analog-to-digital Converter (Adc)  Flash  Time-based Dual-edge-triggered  
Split-based time-interleaved ADC with digital background timing-skew calibration Conference paper
2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Giardini Naxos, Italy, JUN 12-15, 2017
Authors:  Guo M.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.
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Adc  Converters  Digital Background Calibration  Split-adc  Time-interleaving  Timing  
A 5mW 7b 2.4GS/s 1-then-2b/cycle SAR ADC with background offset calibration Conference paper
2017 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, 5-9 Feb. 2017
Authors:  Chi-Hang Chan;  Yan Zhu;  Iok-Meng Ho;  Wai-Hong Zhang;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:12/0  |  Submit date:2018/11/06
An 11b 450 MS/s Three-Way Time-Interleaved Subranging Pipelined-SAR ADC in 65 nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2016,Volume: 51,Issue: 5,Page: 1223-1234
Authors:  Yan Zhu;  Chi-Hang Chan;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:8/0  |  Submit date:2019/02/11
Offset Calibration  Pipelined-successive Approximation Register (Sar) Analog-to-digital Converter (Adc)  Sar Logic  
A 1.1 μW CMOS smart temperature sensor with an inaccuracy of ±0.2 °C (3σ) for clinical temperature monitoring Journal article
IEEE Sensors Journal, 2016,Volume: 16,Issue: 8,Page: 2272-2281
Authors:  Man-Kay Law;  Sanfeng Lu;  Tao Wu;  Amine Bermak;  Pui-In Mak;  Rui P. Martins
Favorite  |  View/Download:8/0  |  Submit date:2019/02/11
Smart Temperature Sensor  Ultra-low Power  High Accuracy  Incremental Analog-to-digital Converter (I-adc),  Multi-ratio Pre-gain  Block-based Data Weighted Averaging (Bdwa)  
Non-recursive digital calibration for joint-elimination of transmitter and receiver I/Q imbalances with minimized add-on hardware Patent
专利类型: 发明专利, 专利号: US9276798B2, 申请日期: 2014-03-26, 公开日期: 2016-03-01
Authors:  Wei-Han Yu;  Chak-Fong CHEANG;  Ka-Fai UN;  Pui-In Mak;  Rui P. Martins
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A 6 b 5 GS/s 4 Interleaved 3 b/Cycle SAR ADC Journal article
IEEE Journal of Solid-State Circuits, 2016,Volume: 51,Issue: 2,Page: 365-377
Authors:  Chi-Hang Chan;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan (Ben) U;  Rui Paulo Martins
Favorite  |  View/Download:9/0  |  Submit date:2019/02/11
Analog-to-digital Conversion  Interleaving  Interpolation  Multibit/cycle Sar  Offset Calibration