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A 1.5GS/s 6bit 2bit/Step asynchronous time interleaved SAR ADC in 65nm CMOS Conference paper
ECS Transactions
Authors:  Wang Z.;  Chen Y.;  Qian H.
Favorite | View/Download:6/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/14