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A 6 b 5 GS/s 4 Interleaved 3 b/Cycle SAR ADC Journal article
IEEE Journal of Solid-State Circuits, 2016,Volume: 51,Issue: 2,Page: 365-377
Authors:  Chi-Hang Chan;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan (Ben) U;  Rui Paulo Martins
Favorite  |  View/Download:14/0  |  Submit date:2019/02/11
Analog-to-digital Conversion  Interleaving  Interpolation  Multibit/cycle Sar  Offset Calibration  
Thermal and Reference Noise Analysis of Time-Interleaving SAR and Partial-Interleaving Pipelined-SAR ADCs Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2015,Volume: 62,Issue: 9,Page: 2196-2206
Authors:  Jianyu Zhong;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:11/0  |  Submit date:2019/02/11
Analog-to-digital Converter (Adc)  Reference Noise  Successive-approximation-register (Sar) Adc  Thermal Noise  
A rapid power-switchable track-and-hold amplifier in 90-nm CMOS Journal article
IEEE Transactions on Circuits and Systems II: Express Briefs, 2010,Volume: 57,Issue: 1,Page: 16
Authors:  He-Gong Wei;  U-Fat Chio;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
Favorite  |  View/Download:15/0  |  Submit date:2018/10/30
High-accuracy  High-speed  Power Switchable  Track-and-hold (T/h)  
A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2010,Volume: 45,Issue: 6,Page: 1111-1121
Authors:  Yan Zhu;  Chi-Hang Chan;  U-Fat Chio;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo Martins;  Franco Maloberti
Favorite  |  View/Download:102/0  |  Submit date:2018/10/30
Charge-recovery  Reference-free  Switched Technique