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A 13-bit 60MS/s split pipelined ADC with background gain and mismatch error calibration Conference paper
2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), Singapore, Singapore, 11-13 Nov. 2013
Authors:  Li Ding;  Wenlan Wu;  Sai-Weng Sin;  Seng-Pan U;  R.P.Martins
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