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A 1.2-V 10-bit 60–360MS/s Time-Interleaved Pipelined ADC in 0.18μm CMOS with Minimized Supply Headroom Journal article
IET Circuits, Devices & Systems, 2010,Volume: 4,Issue: 1,Page: 1-13
作者:  S.-W. Sin;  Seng-Pan U;  R.P. Martins
收藏  |  浏览/下载:1/0  |  提交时间:2019/03/14
1.2-V, 10-bit, 60– 360 MS/s time-interleaved pipelined analog-to-digital converter in 0.18 mm CMOS with minimised supply headroom Journal article
IET Circuits, Devices & Systems, 2010,Volume: 4,Issue: 1,Page: 1-13
作者:  S.-W. Sin;  Seng-Pan U;  R.P. Martins
收藏  |  浏览/下载:2/0  |  提交时间:2019/02/27