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Uniform Quantization Theory-Based Linearity Calibration for Split Capacitive DAC in an SAR ADC Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016,Volume: 24,Issue: 7,Page: 2603-2607
Authors:  Jianwei Liu;  Yan Zhu;  Chi-Hang Chan;  Sai-Weng Sin;  Seng-Pan U;  Rui Paulo da Silva Martins
Favorite  |  View/Download:16/0  |  Submit date:2019/02/14
Background Linearity Calibration  Splitdigital- To-analog Converter (Dac)  Successive Approximation Register (Sar) Adc  Uniform Quantization Theory (Uqt)  
An 11b 450 MS/s Three-Way Time-Interleaved Subranging Pipelined-SAR ADC in 65 nm CMOS Journal article
IEEE Journal of Solid-State Circuits, 2016,Volume: 51,Issue: 5,Page: 1223-1234
Authors:  Yan Zhu;  Chi-Hang Chan;  Seng-Pan U;  Rui Paulo Martins
Favorite  |  View/Download:10/0  |  Submit date:2019/02/11
Offset Calibration  Pipelined-successive Approximation Register (Sar) Analog-to-digital Converter (Adc)  Sar Logic  
Histogram-based ratio mismatch calibration for bridge-DAC in 12-bit 120 MS/s SAR ADC Journal article
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016,Volume: 24,Issue: 3,Page: 1203-1207
Authors:  Yan Zhu;  Chi-Hang Chan;  Si-Seng Wong;  U Seng-Pan;  Rui Paulo Martins
Favorite  |  View/Download:8/0  |  Submit date:2019/02/11
Bridge Dac  Linearity Calibration  Sar Adc  
Wide Input Range Supply Voltage Tolerant Capacitive Sensor Readout Using On-Chip Solar Cell Journal article
Journal of Circuits, Systems and Computers, 2016,Volume: 25,Issue: 1
Authors:  Suyan Fan;  Man-Kay Law;  Mingzhong Li;  Zhiyuan Chen;  Chio-In Ieong;  Pui-In Mak;  Rui P. Martins
Favorite  |  View/Download:11/0  |  Submit date:2019/02/11
On-chip Solar Cell  Capacitive Sensor Readout  Ultra-low Voltage  Ultra-low Power  Two-step Conversion  Psrr