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A 2-GS/s 8-Bit ADC Featuring Virtual-Ground Sampling Interleaved Architecture in 28-nm CMOS
Journal article
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2018,Volume: 65,Issue: 11,Page: 1534-1538
Authors:
Wang, X. Shawn
;
Jin, Xin
;
Du, Jieqiong
;
Li, Yilei
;
Du, Yuan
;
Wong, Chien-Heng
;
Kuan, Yen-Cheng
;
Chan, Chi-Hang
;
Chang, Mau-Chung Frank
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View/Download:11/0
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TC[WOS]:
3
TC[Scopus]:
3
|
Submit date:2019/01/17
Analog-to-digital converter (ADC)
virtual-ground sampling
SAR
time-interleaved
Generalized circuit techniques for low-voltage high-speed reset- and switched-opamps
Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2008,Volume: 55,Issue: 8,Page: 2188-2201
Authors:
Sai-Weng Sin
;
Seng-Pan U
;
R. P. Martins
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View/Download:16/0
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TC[WOS]:
3
TC[Scopus]:
2
|
Submit date:2019/02/11
Common-mode Feedback (Cmfb)
Finite-gain Compensation (Fgc)
Low Voltage (Lv)
Reset-opamp (Ro)
Switched-capacitor (Sc) Circuits
Switched-opamp (So)
Novel low-voltage circuit techniques for fully-differential reset- and switched-opamps
Conference paper
2005 PhD Research in Microelectronics and Electronics - Proceedingsof the Conference, Lausanne, Switzerland, 7 25, 2005 - 7 28, 2005
Authors:
Sin, Sai-Weng
;
U, Seng-Pan
;
Martins, R.P.
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View/Download:16/0
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TC[WOS]:
0
TC[Scopus]:
0
|
Submit date:2018/11/06