UM

Browse/Search Results:  1-6 of 6 Help

Selected(0)Clear Items/Page:    Sort:
A 0.19 mm(2) 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS Conference paper
Authors:  Zhu, Yan;  Chan, Chi-Hang;  Zheng, Zi-Hao;  Li, Cheng;  Zhong, Jian-Yu;  Martins, Rui P.
Favorite | View/Download:41/0 | TC[WOS]:2 TC[Scopus]:0 | Submit date:2018/10/30
Time-interleaved ADC  sampling front-end design  passive sharing  pipelined-SAR ADC  switch bootstrap technique  
A 0.19 mm2 10 b 2.3 GS/s 12-Way time-interleaved pipelined-sar ADC in 65-nm CMOS Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018,Volume: 65,Issue: 11,Page: 3606-3616
Authors:  Zhu Y.;  Chan C.-H.;  Zheng Z.-H.;  Li C.;  Zhong J.-Y.;  Martins R.P.
Favorite | View/Download:8/0 | TC[WOS]:2 TC[Scopus]:0 | Submit date:2019/02/11
passive sharing  pipelined-SAR ADC  sampling front-end design  switch bootstrap technique  Time-interleaved ADC  
A sub-1V BJT-based CMOS temperature sensor from 55°C to 125°C Conference paper
ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems, Seoul, SOUTH KOREA, MAY 20-23, 2012
Authors:  Wang B.;  Law M.K.;  Tang F.;  Bermak A.
Favorite | View/Download:12/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/14
Generalized circuit techniques for low-voltage high-speed reset- and switched-opamps Journal article
IEEE Transactions on Circuits and Systems I: Regular Papers, 2008,Volume: 55,Issue: 8,Page: 2188-2201
Authors:  Sai-Weng Sin;  Seng-Pan U;  R. P. Martins
Favorite | View/Download:9/0 | TC[WOS]:3 TC[Scopus]:0 | Submit date:2019/02/11
Common-mode Feedback (Cmfb)  Finite-gain Compensation (Fgc)  Low Voltage (Lv)  Reset-opamp (Ro)  Switched-capacitor (Sc) Circuits  Switched-opamp (So)  
Design of Very High-Frequency Multirate Switched-Capacitor Circuits – Extending the Boundaries Of CMOS Analog Front-End Filtering Book
US:Springer US, 2006
Authors:  U Seng Pan;  Martins Rui Paulo;  Epifanio da Franca Jose de Albuquerque
Favorite | View/Download:17/0 | TC[WOS]:0 TC[Scopus]:0 | Submit date:2019/02/26
Cmos  Cmos Analog Integrated Circuit  Filter  Front-end Filtering  Gain & Offset Compensation  High-frequency  Multirate Signal Processing  Secs  Switched-capacitor  The Kluwer International Series In engIneerIng And Computer  Timing-mismatch And Jitter  Calculus  Consumption  Integrated Circuit  
A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications Conference paper
Proceedings - IEEE International Symposium on Circuits and Systems, Vancouver, CANADA, MAY 23-26, 2004
Authors:  Mak P.-I.;  U S.-P.;  Martins R.P.
Favorite | View/Download:12/0 | TC[WOS]:3 TC[Scopus]:0 | Submit date:2019/02/11